1Jerry2Zhao3's Stars
XuehaiPan/nvitop
An interactive NVIDIA-GPU process viewer and beyond, the one-stop solution for GPU process management.
open-mmlab/mmyolo
OpenMMLab YOLO series toolbox and benchmark. Implemented RTMDet, RTMDet-Rotated,YOLOv5, YOLOv6, YOLOv7, YOLOv8,YOLOX, PPYOLOE, etc.
FeiYull/TensorRT-Alpha
🔥🔥🔥TensorRT for YOLOv8、YOLOv8-Pose、YOLOv8-Seg、YOLOv8-Cls、YOLOv7、YOLOv6、YOLOv5、YOLONAS......🚀🚀🚀CUDA IS ALL YOU NEED.🍎🍎🍎
T-head-Semi/openc910
OpenXuantie - OpenC910 Core
alexforencich/verilog-pcie
Verilog PCI express components
KastnerRG/riffa
The RIFFA development repository
zhiqwang/yolort
yolort is a runtime stack for yolov5 on specialized accelerators such as tensorrt, libtorch, onnxruntime, tvm and ncnn.
Xilinx/dma_ip_drivers
Xilinx QDMA IP Drivers
WangXuan95/Xilinx-FPGA-PCIe-XDMA-Tutorial
Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核
openasic-org/xkISP
xkISP:Xinkai ISP IP Core (HLS)
fpgadeveloper/fpga-drive-aximm-pcie
Example designs for FPGA Drive FMC
blackcoffeerobotics/bcr_bot
A Gazebo-ROS AMR robot with differential drive, depth camera, IMU and 2D LiDAR
ipbus/ipbus-firmware
Firmware that implements a reliable high-performance control link for particle physics electronics, based on the IPbus protocol
ashnair1/dotadevkit
Toolkit for working with the DOTA aerial object detection dataset
d953i/Custom_Part_Data_Files
Xilinx PCIe to MIG DDR4 example designs and custom part data files
LCAI-TIHU/HW
LCAI-TIHU HW is an AI inference processor which is comprised of RISC-V cpu, nvdla, NoC bus, PCIe module, DDR, SRAM, bootROM, DMA and peripherals.
Aperture-Electronic/SystemVerilog-Bitmap-Library-AXI-Image-VIP
Bitmap Processing Library & AXI-Stream Video Image VIP
ipbus/ipbus-software
Software that implements a reliable high-performance control link for particle physics electronics, based on the IPbus protocol
ExtremeViscent/SR-UNet
Customized implementation of the U-Net in PyTorch for super-resolving hyper-low-field MRI images.
amitabhyadav/hdl_visualiser
A python GUI for visualizing your HDL code (VHDL and Verilog), show I/Os, internal signals and architecture functionalities.
juancamilovega/SHIP
An RDMA accessible storage system that is usable by FPGAs and CPUs
alexvonduar/fpga_embedded_vision
tokudayo/fast-matrix-nms
The Fastest Matrix NMS in the West.
zakinder/KV260_IMX477_CAMERA
KV260 BOARD AND IMX477 CAMERA
luzz94/SimpleFOC_VESC6
wincle626/ZCU106_FFT_REF_DESIGN
wincle626/ZCU106_SD_Card_Setup
etwmc/ConcurrentPerformanceToolkit
This is a C++ skeleton code to test the maximum operation per second for a block of code.
Nullray/ICT
trbauer/gops
GPU Ops - Simple Benchmark