Output Mismatch in ARM mult , scale, Complex real mult in CMSIS 5.9 version
BhaskarsarmaP opened this issue · 1 comments
BhaskarsarmaP commented
Here, As shown in the image above (https://github.com/ARM-software/CMSIS_5/blob/5.9.0/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c) For q31 case, we are first right shifting and then left shifting by a bit which results in precision loss of LSB.
When this is run multiple times, It can result in a huge loss of data.
For q15, q7 it is handled correctly like below.
The issue also exists for mult, scale, and other cases where q31 mult operations are involved.
Please let us know the plans for fixing this.
JonatanAntoni commented
Hi @BhaskarsarmaP,
Please raise your CMSIS-DSP issue at the new repository
https://github.com/ARM-software/CMSIS-DSP.
Thanks,
Jonatan