Issue when ICACHE is present but not DCACHE in M55 core
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djemaiMohamed commented
CMSIS_5/CMSIS/Core/Include/cachel1_armv7.h
Line 115 in 55b1983
This function does not compile with GCC when just ICACHE is present in the Device. The error is:
cachel1_armv7.h:328:72: error: unused parameter 'addr' [-Werror=unused-parameter] 328 | __STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (volatile void *addr, int32_t dsize) |
This file must be updated to make use of the function parameters when the condition #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
is not met. A quick solution is to add an #else
part where parameters addr and dsize are set to:
(void)addr; (void)dsize;
Full fix would be something like:
{
#if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
if ( isize > 0 ) {
int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U));
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_ICACHE_LINE_SIZE - 1U) */;
__DSB();
do {
SCB->ICIMVAU = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
op_addr += __SCB_ICACHE_LINE_SIZE;
op_size -= __SCB_ICACHE_LINE_SIZE;
} while ( op_size > 0 );
__DSB();
__ISB();
}
#else
(void)addr;
(void)dsize;
#endif
}```
There are other functions in the same file that give the same issue. They need to be updated in the same as this function.