A DDR2 memory interface for the Digilent Nexys4 board that does not rely on the Xilinx MIG. This project is based on a working DDR2 interface very kindly donated by a friend. Please note that this is currently an unfinished implementation with a number of serious limitations.
AlisonNi/DDR2_memory_interface
A DDR2 memory interface for the Digilent Nexys4 board that does not rely on the Xilinx MIG
VerilogGPL-2.0