/fp_gen

Generator of synthesizable float point operators in Verilog HDL

Primary LanguageVerilogBSD 3-Clause "New" or "Revised" LicenseBSD-3-Clause

fp_gen

Generator of synthesizable float point operators in Verilog HDL

Depends:

  1. tinylisp
  2. tinylisp_extra_funcs

format

Format constraints:

  1. Little endian.
  2. sign-expt_msb==1
  3. expt_lsb-frac_msb==1
  4. frac_lsb==0

Operators:

operators