Fede-26/Eater_6502_FPGA

Replica of Ben Eater's 6502 breadboard computer using an FPGA

VHDL

Eater_6502

Introduction

Eater_6502 is a 65c02 emulator running on the Tang Nano 9k FPGA.

Inspired by the Ben Eater 6502 computer.

Features

Address bus
Data bus
...

Pinout

Addr: 16-bit address bus: 25 [msb] to 53, 57 to 68 [lsb]
Data: 8-bit data bus: 77 [msb] to 70 [lsb]
R/W: Read/Write signal: 69
Clock: 10Hz clock signal: 63