Very confusing 2.5.X jump formats
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The 2.5.0 and 2.5.4 formats are understandable, but 2.5.1 to 2.5.3 are pretty confusing for me.
Do format 2.5.1 and 2.5.2 also use IM1 as OPJ, like format 2.5.0?
If not, is format 2.5.1 supposed to be a direct jump, as I understand table 3.15, or a syscall as table 4.9 and 5.15 show?
Format 2.5.2 seems to be an unconditional jump, but then what would the register operand be for? Also, format 2.5.2 is listed as format for sub_maxlen/jump_pos in chapter 5.
If they use IM1 as OPJ, what about opcodes 0-9? Are they undefined or the same as for format 2.5.0? I assume that the non-mentioned opcodes of 58 and above are undefined.
Also, does format 2.5.1 use its register destination operand as base address instead of the IP? Or does it mean that ALU-and-branch instructions use RD as result destination exclusively?
After examining the list in chapter 5, format 2.5.3 seems to be using the normal compare operations, but traps instead of jumping, using IM2 (why not IM1 as format 2.5.0?) as OPJ. This might be understandable, but why is it listed as having opcode 63?
Sorry for all the questions, I hope it helps to make the specification as precise as possible.
You are right that the manual is unclear here. I have updated it now.
Format 2.5.0 - 2.5.3 all have OPJ in the 8-bit field IM1. Only format 1.6A/B and 2.5.0B can be used for jump instructions with a memory operand. The base pointer is in RT for A formats and in RS for B formats.
Formats 2.5.x are used for jump/call/return instructions with OP1 = 0 - 4 indicating the sub-mode. OP1 >= 8 is used for non-jump instructions. OP1 = 5 - 7 is unused.
SUB/JUMP instructions can only use format 1.6B and 2.5.0B. SUB/JUMP instructions with an immediate operand are changed by the assembler to ADD/JUMP instructions with the sign of the immediate operand changed. This is how I made space for the unconditional jump and call instructions using format 1.7D.
What does "interrupt number" mean for IM1 in conditional Traps? As they are coded in format 2.5.3, which uses IM1 for OPJ, it always is 63. Is this wanted?
Also, the instruction might be the critical path for decoding as it first has to decode OP1 to select format 2.5.3, then IM1 as OPJ to select conditional traps, and finally IM2 as OPJ for the trap.
You are right that there is a conflict since IM1 is always 63. I think we should remove conditional traps all together because the discussion on traps has led to the conclusion that we should avoid traps in the execution stage of the pipeline. The preferred method for detecting errors is a conditional jump to an error handling routine. Alternatively, you can use an addressing mode with limit to check array bounds. The trap will then be detected in the address generation stage in the pipeline where we are generating traps anyway for illegal memory addresses.
Since this has been resolved, I will close the issue to clean up a bit.