Attacker's ability
Closed this issue · 5 comments
wxbbuaa2011 commented
Can an attacker observe that the address on the DRAM is read or written?Or can an attacker know the read after write pattern?
dgruss commented
Not with this side channel.
dgruss commented
What would you want to attack with that?
wxbbuaa2011 commented
I want to attack the DRAM of the FPGA or the accelerator.
在 2018-11-28 15:02:29,"Daniel Gruss" <notifications@github.com> 写道:
What would you want to attack with that?
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dgruss commented
On 28.11.18 10:20, wxbbuaa2011 wrote:
I want to attack the DRAM of the FPGA or the accelerator.
Yes, but why would write accesses matter? I'm not confident you can get this information out of this side channel - you
would not be able to distinguish read and write accesses (afaik). And I'm not sure what you would gain by being able to
distinguish read and write accesses either...
wxbbuaa2011 commented
Thank you! I want to know how many data to write or how many to read in a consecutive address. And I want to know how many a continuous address is read or how many consecutive addresses are written.
在 2018-11-28 19:43:53,"Daniel Gruss" <notifications@github.com> 写道:
On 28.11.18 10:20, wxbbuaa2011 wrote:
I want to attack the DRAM of the FPGA or the accelerator.
Yes, but why would write accesses matter? I'm not confident you can get this information out of this side channel - you
would not be able to distinguish read and write accesses (afaik). And I'm not sure what you would gain by being able to
distinguish read and write accesses either...
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