Discrepancy in Bulk Substrate Thickness
Closed this issue · 7 comments
Context
I was writing a .tek file for ASITIC app and I found the bulk substrate thickness measurement with two different values.
- SG13G2_os_process_spec.pdf: 750 um
- Using OpenEMS Python with IHP SG13G2 v1.1.pdf: 280 um
Screenshots
Question
Which value is the right value?
@Iranildot the valid answer is 280 um and it should be used in your modeling. The 750 um comes form the wafer processed in our clean room which is then mechanically postprocess to get different thicknesses.
Just for completeness, the final wafer thickness depends on the selected package. 280 µm is a typical value, but could be different.
@Iranildot You write a tech file for ASiTiC?
The 750 um comes from the wafer processed in our clean room which is then mechanically postprocess to get different thicknesses.
...
the final wafer thickness depends on the selected package. 280 µm is a typical value, but could be different.
should we make an additional note in the process spec that clearly explains this?
@sergeiandreyev Yes, I think that would be helpful.
More information about the options of the wafer thickness offered by IHP can be found here
One more comment: the 280 micron bulk silicon thickness results in 300 micron total thickness of the stackup. Thickness specified by IHP is total chip thickness.