Artemis - Stacked Version - Board Layout Review
MantaRayDeeJay opened this issue · 2 comments
_Review Status : Finished
GLOBAL
Schematic
- ESD Protection behind the USB connector should be implemented.
- I think I2C_RTC chip, I2C_IO_expander chip and I2C_Pull-up resistors should be powered by the same 3v3_I2C power.
- Rename Vbat label by bat+ on the "Battery Protection" sheet to improve reading and avoid any confuse.
Layout
- Improve ESP32 Antenna clearance area. (See comments on Apollo board Review Ticket)
- Track loop : Disconnect GND tracks between C11&18 and C10&C16. In this way each "capacitor" group can have a unique link to the ground area by their own VIA.
- Track loop : Disconnect GND track between U2.2 and U2.3 pins.
- Track loop : Disconnect some 3v3_I2c tracks and increase some 3v3_I2c tracks width.
- Track over plane : Remove the Vbat track which is over the Vbat Plane shape.
- Plane shape : Improve Vbat- plane shape layout.
- Plane shape : Improve Vbat+ plane shape layout.
- Plane shape : Improve Inductor L1 plane shapes + Add a GND shield Plane shape
- Clock Signal : Improve Clearance for the CLK pin of the FLASH chip.
- I2C bus : Check CLK and Data signal tracks (Improve clearance from others nets as do as possible)
- Remove Mouting Holes copper area in the ESP32 Antenna clearance area.
DRC Issues
- Solve GND MouTinG Holes issue. (Hole and Pad size can't be the same if you plan to connect the Mtg Hole to a net)
SilkScreen
- Ref. Des. string Overlap the copper layer
- Remove Mouting Hole Ref. Des. String on SilkSreen layer
- Replace "Artemis" string by "ESP32" on ESP32 board.
3D Package
- Check File links and 3D files presence for the following packages : SOIC-8, SOP-8, SOP-16, Inductor (L1), Micro-USB and Tactile Switches.
DETAILS
Schematic
-
I2C chips (except for the LC709203 fuel gauge) and I2C Pull-Up resistors should should be powered by the same 3v3_I2C power.
-
Rename Vbat label by bat+ on the "Battery Protection" sheet to improve reading and avoid any confuse.
Layout
- ESP32 Antenna clearance
DRC Issues
-
Track loop : Disconnect some 3v3_I2c tracks and increase some 3v3_I2c tracks width.
-
Track over plane : Remove the Vbat track which is over the Vbat Plane shape.
-
Plane shape : Improve Vbat+ plane shape layout.
(1) Path between Battery connector and TP4056 : Remove Loops and improve path width
(2) Utility of Bottom track bridge ? It adds loops, not needed.
(3) Power Path on the plane : From Battery connector to TP4056 charger chip, +5V, +3.3V and +3.3V_MCU regulators.
(4) Improve Regulator Power Path
-
Plane shape : Improve Inductor L1 plane shapes + Add a GND shield Plane shape
-
Clock Signal : Improve Clearance for the CLK pin of the FLASH chip.
-
Remove Mouting Holes copper area in the ESP32 Antenna clearance area.
SilkScreen
3D Packages
Some comments on the review points:
ESD: no low cost dev board that i know of has ESD on the usb input and this version is still kinda intended to be lowcost and possible to hand solder
U2: connected the same way basically all charger boards have the mosfet connected (some even have filled plane). also doesn't cause any electrical issues at all
VBat track width: not really possible with the layout and it is also sufficient for the expected current (slightly improved it already)
@Tobi3566
ESD Protection: why and how to protect microcontrollers efficiently
https://www.youtube.com/watch?v=56eZHBBuvsk