JAYRAM711
VLSI Enthusiast | Student at SIST | Ex-Executive @Robotics-Club-SIST | Trainee at MAVEN SILICON
Sathybama Institute of Science and Technologychennai
Pinned Repositories
100-DAYS-OF-RTL
This Repo contains Codes of RTLs for implementation of various circuit designs using Verilog in Xilinx ISE 14.7 and sometimes Modelsim tools
AHB2APB-PROTOCOL-BRIDGE
The AHB to APB Bridge is an AHB slave, providing an interface between the high-speed AHB and the low-power APB. Read and Write transfers on the AHB are converted into equivalent Transfers on the APB
FPGA-PROJECTS
This repository contains the files related to Implementations of various Digital circuits on the NEXYS A7 FPGA Board
FSM-MINI-PROJECTS
This Repo contains Source Codes of FSM-BASED implementation of various circuit designs using Verilog in Xilinx ISE 14.7 and sometimes Modelsim tools
HDL-BITS
This Repo consists codes for some the problem statements from the HDL BITS website and can help you in your journey to learn Verilog from the scratch
INVERTER-DESIGN-AND-ANALYSIS-USING-SKY130PDK
CMOS inverter schematic and layout design and analysis utilizing the skywater 130 nm pdk and numerous open source tools such as Xschem, NGSPICE, MAGIC, Netgen, and so on.
riscv-myth-workshop-sep23-JAYRAM711
riscv-myth-workshop-sep23-JAYRAM711 created by GitHub Classroom
JAYRAM711's Repositories
JAYRAM711/100-DAYS-OF-RTL
This Repo contains Codes of RTLs for implementation of various circuit designs using Verilog in Xilinx ISE 14.7 and sometimes Modelsim tools
JAYRAM711/FSM-MINI-PROJECTS
This Repo contains Source Codes of FSM-BASED implementation of various circuit designs using Verilog in Xilinx ISE 14.7 and sometimes Modelsim tools
JAYRAM711/INVERTER-DESIGN-AND-ANALYSIS-USING-SKY130PDK
CMOS inverter schematic and layout design and analysis utilizing the skywater 130 nm pdk and numerous open source tools such as Xschem, NGSPICE, MAGIC, Netgen, and so on.
JAYRAM711/AHB2APB-PROTOCOL-BRIDGE
The AHB to APB Bridge is an AHB slave, providing an interface between the high-speed AHB and the low-power APB. Read and Write transfers on the AHB are converted into equivalent Transfers on the APB
JAYRAM711/FPGA-PROJECTS
This repository contains the files related to Implementations of various Digital circuits on the NEXYS A7 FPGA Board
JAYRAM711/HDL-BITS
This Repo consists codes for some the problem statements from the HDL BITS website and can help you in your journey to learn Verilog from the scratch