KULeuven-MICAS/zigzag

Problem in using cacti when generating architecture

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Hi,

As I understand, the Architecture Generator mentioned in the paper is corresponding to the cacti, which auto-generates mem_pool.yaml file.
I try to run

python cacti_top.py --mem_type "cache" --cache_size 256 --IO_bus_width 32 --ex_rd_port 1 --ex_wr_port 1 --rd_wr_port 0 --bank_count 1 --mem_pool_path /home/jiyuhao/repo/zigzag/zigzag/classes/cacti/cacti_master/mem_pool.yaml

in cacti/cacti_master folder, but an error occurs:

ERROR: no valid tag organizations found
Traceback (most recent call last):
  File "*/zigzag/zigzag/classes/cacti/cacti_master/cacti_top.py", line 66, in <module>
    with open('%s/cache.cfg.out' % self_gen_path, 'r') as fp:
FileNotFoundError: [Errno 2] No such file or directory: '*/zigzag/zigzag/classes/cacti/cacti_master/self_gen/cache.cfg.out'

There seems something wrong with

./cacti -infile cache.cfg

command and no cache.cfg.out generated.

Would you please give me some advice?

Hi xxzh12,

Thank you for bringing up this question.

I'm not certain which paper you are referring to, but I suppose it does not matter with your current issue.

The problem arises when the mem_type is set to cache (referred to as main memory in the Cacti keyword), and the tag is not configured correctly. Consequently, Cacti throws an error, and no output file is generated.

Typically, I use sram as the mem_type, so I'm unfamiliar with the additional parameters required for a cache.

If you're solely utilizing SRAM in your hardware, updating the mem_type directly to sram should resolve the issue. Command as below:

python cacti_top.py --mem_type "sram" --cache_size 256 --IO_bus_width 32 --ex_rd_port 1 --ex_wr_port 1 --rd_wr_port 0 --bank_count 1 --mem_pool_path /home/jiyuhao/repo/zigzag/zigzag/classes/cacti/cacti_master/mem_pool.yaml

However, if a cache is involved in your template, you could check the Cacti repository for proper parameter settings for caches.

Additionally, for your reference, mem_pool.yaml is used to store the existing Cacti output. You can review the results or use the file as input for other scripts.

If you are interested about how Cacti is integrated into the hardware template definition, you can examine an example in another repository.

Please let me know if you encounter any other problems.

Best regards,
Jiacong