ROCm-Developer-Tools/LLVM-AMDGPU-Assembler-Extra

Narrow repository's focus

almson opened this issue · 14 comments

This repository seems to do two things. One is to host a now-unnecessary tool (?) and the other to host some samples of writing GCN LLVM assembly. I think it would be best to focus on the samples. It would be great if they could compile without LLVM sources and with the version of llvm-mc that ships with ROCm 1.2. (I get error error: floating point operands not allowed with sext() modifier when compiling examples/asm-kernel/asm-kernel.s)

I'm sorry, there is no error if I use /opt/rocm/hcc-lc/bin/llvm-mc instead of /opt/rocm/llvm/bin/llvm-mc. Why are these different?

Regarding LLVM, the issue that I've found is that this command works:

/opt/rocm/hcc-lc/bin/llvm-mc -arch=amdgcn -mcpu=fiji -filetype=obj -o asm.o asm-kernel.s

while this command does not:

/opt/rocm/llvm/bin/llvm-mc -arch=amdgcn -mcpu=fiji -filetype=obj -o asm.o asm-kernel.s

Since one is a symlink of the other, I assume the issue has to do with paths. I suggest to either make both commands work, or to put working symlinks into /usr/bin.

P.S. the version of llvm-mc on my system is 3.9.0svn.

Hi,

Do you have more information about the failing command? I can't really think of any reason why one one command would fail if it is a symlink of the other binary.

In 1.2 we still have two LLVM Compiler code generators,

One compiler leverages the LLVM Native Code Generator for GCN ISA.

A second llvm based compiler which compiles to an intermediate language - HSAIL and has proprietary finalizer aka shader compiler. It is our legacy compiler which is used with HSA compatibility with PRM spec. It does not support GCN Assembly support

@tstellarAMD I don't. I'm just happy that one of them works :)

@gstoner The assembler under discussion is in hcc-lc, which should be the new non-HSAIL toolchain.

I mean how does it fail? Is there an error message?

@tstellarAMD Yes, as mentioned in the first post, error: floating point operands not allowed with sext() modifier on the instruction which loads a floating point literal in a VGPR.

Ok so the real issue is right now is the shipping version HCC with ROCm 1.2 does not support ASSEMBLY note this is still based CLANG 3.5 Frontend.

But if you build from source with new CLANG 3.9 version of HCC you can ASSEMBLY to work.

Can you print the version of the compiler for the two paths above?

One thing just for FYI. We are going to Move to CLANG 3.9 version of the compiler in 1.3 in October.

@gstoner You're already shipping CLANG 3.9.

rocm package version 1.2.0 installed in a clean Ubuntu 14.04 Docker container.

/opt/rocm/hcc-lc/bin/clang --version

HCC clang version 3.5.0  (based on HCC 0.10.16313-d90738a-10704f4 LLVM 3.5.0svn)
Target: x86_64-unknown-linux-gnu
Thread model: posix

/opt/rocm/llvm/bin/clang --version

clang version 3.9.0 
Target: x86_64-unknown-linux-gnu
Thread model: posix
InstalledDir: /opt/rocm/llvm/bin

/opt/rocm/hcc-lc/bin/llvm-mc --version:

  LLVM version 3.9.0svn
  Optimized build.
  Default target: x86_64-unknown-linux-gnu
  Host CPU: haswell

  Registered Targets:
    amdgcn - AMD GCN GPUs
    r600   - AMD GPUs HD2XXX-HD6XXX
    x86    - 32-bit X86: Pentium-Pro and above
    x86-64 - 64-bit X86: EM64T and AMD64

ls -al /opt/rocm/hcc-lc/bin/llvm-mc --version

LLVM (http://llvm.org/):
  LLVM version 3.9.0svn
  Optimized build.
  Default target: x86_64-unknown-linux-gnu
  Host CPU: haswell

  Registered Targets:
    amdgcn - AMD GCN GPUs
    r600   - AMD GPUs HD2XXX-HD6XXX
    x86    - 32-bit X86: Pentium-Pro and above
    x86-64 - 64-bit X86: EM64T and AMD64

ls -l /opt/rocm/hcc-lc/bin/llvm-mc

lrwxrwxrwx 1 root root 19 Aug  4 02:32 /opt/rocm/hcc-lc/bin/llvm-mc -> ../llvm/bin/llvm-mc

/opt/rocm/hcc-lc/llvm/bin/llvm-mc --version

LLVM (http://llvm.org/):
  LLVM version 3.9.0svn
  Optimized build.
  Default target: x86_64-unknown-linux-gnu
  Host CPU: haswell

  Registered Targets:
    amdgcn - AMD GCN GPUs
    r600   - AMD GPUs HD2XXX-HD6XXX
    x86    - 32-bit X86: Pentium-Pro and above
    x86-64 - 64-bit X86: EM64T and AMD64

ls -l /opt/rocm/hcc-lc/llvm/bin/llvm-mc

-rwxr-xr-x 1 root root 6974645 Jul 15 15:06 /opt/rocm/hcc-lc/llvm/bin/llvm-mc

/opt/rocm/hcc-lc/bin/llvm-mc -arch=amdgcn -mcpu=fiji -filetype=obj -o asm.o LLVM-AMDGPU-Assembler-Extra/examples/asm-kernel/asm-kernel.s

<no output. success>

/opt/rocm/llvm/bin/llvm-mc -arch=amdgcn -mcpu=fiji -filetype=obj -o asm.o LLVM-AMDGPU-Assembler-Extra/examples/asm-kernel/asm-kernel.s

LLVM-AMDGPU-Assembler-Extra/examples/asm-kernel/asm-kernel.s:64:24: error: floating point operands not allowed with sext() modifier
  v_mov_b32 v0, 3.14159
                       ^
LLVM-AMDGPU-Assembler-Extra/examples/asm-kernel/asm-kernel.s:64:24: error: failed parsing operand.
  v_mov_b32 v0, 3.14159
                       ^

/opt/rocm/llvm/bin/clang -x assembler -target amdgcn--amdhsa -mcpu=fiji -c -o asm.o LLVM-AMDGPU-Assembler-Extra/examples/asm-kernel/asm-kernel.s

LLVM-AMDGPU-Assembler-Extra/examples/asm-kernel/asm-kernel.s:64:24: error: floating point operands not allowed with sext() modifier
  v_mov_b32 v0, 3.14159
                       ^
LLVM-AMDGPU-Assembler-Extra/examples/asm-kernel/asm-kernel.s:64:24: error: failed parsing operand.
  v_mov_b32 v0, 3.14159
                       ^

/opt/rocm/hcc-lc/llvm/bin/llvm-mc -arch=amdgcn -mcpu=fiji -filetype=obj -o asm.o LLVM-AMDGPU-Assembler-Extra/examples/asm-kernel/asm-kernel.s

<no output. success>

apt show rocm-dev

Package: rocm-dev
Source: AMD
Maintainer: James Edwards (JamesAdrian.Edwards@amd.com)
Homepage: https://github.com/RadeonOpenCompute/ROCm 
Version: 1.2.0
Depends: hsa-ext-rocr-dev (=1.2.0), hsa-rocr-dev (=1.2.0), hsakmt-roct-dev (=2.0.1), llvm-amdgpu (=3.9.dev), rocm-smi (=1.0.1), hcc_hsail (=0.10.16313-d90738a-10704f4), hcc_lc (=0.10.16313-d90738a-10704f4), hip_base (=0.92.0), hip_doc (=0.92.0), hip_hcc (=0.92.0), hip_samples (=0.92.0)
Priority: extra
Section: devel
Download-Size: 1746 B
Installed-Size: unknown
APT-Manual-Installed: yes
APT-Sources: http://packages.amd.com/rocm/apt/debian/ trusty/main amd64 Packages
Description: Radeon Open Compute (ROCm) Runtime software stack

Notice it pulls in llvm-amdgpu version 3.9.dev

Thank you, this helps so we can recreate the environment. 3.9 was on the bubble for inclusion in 1.2.

I need a strong cup of coffee this morning or more sleep or both; we are using the 3.9 code generator of LLVM in ROCm 1.2, where the delta is in the HCC CLANG Front-end. It is currently version 3.5 of CLANG, we are in the process of moving it to 3.9 CLANG FE.

We will try and recreate this issue and see what is going on.

FYI, I successfully compiled and ran asm-kernel with the following:

cd LLVM-AMDGPU-Assembler-Extra/examples/asm-kernel
/opt/rocm/hcc-lc/bin/llvm-mc -arch=amdgcn -mcpu=fiji -filetype=obj asm-kernel.s -o asm-kernel.o
/opt/rocm/llvm/bin/clang -target amdgcn--amdhsa asm-kernel.o -o asm-kernel.co
/opt/rocm/hcc-lc/bin/clang++ -std=c++11 asm-kernel.cpp -o asm-kernel ../common/dispatch.cpp /opt/rocm/hsa/lib/libhsa-runtime64.so.1 -I/opt/rocm/hsa/include -I../common

So it is indeed possible to run the examples on stock ROCm 1.2. If you could update the cmake files to compile the examples without any intervention (and presumably remove amdphdrs), it'd be great.

Thanks for tracking this down, we will get this cleaned up.

greg
On Aug 24, 2016, at 11:44 AM, almson <notifications@github.commailto:notifications@github.com> wrote:

FYI, I successfully compiled and ran asm-kernel with the following:

cd LLVM-AMDGPU-Assembler-Extra/examples/asm-kernel
/opt/rocm/hcc-lc/bin/llvm-mc -arch=amdgcn -mcpu=fiji -filetype=obj asm-kernel.s -o asm-kernel.o
/opt/rocm/llvm/bin/clang -target amdgcn--amdhsa asm-kernel.o -o asm-kernel.cohttp://asm-kernel.co/
/opt/rocm/hcc-lc/bin/clang++ -std=c++11 asm-kernel.cpp -o asm-kernel ../common/dispatch.cpp /opt/rocm/hsa/lib/libhsa-runtime64.so.1 -I/opt/rocm/hsa/include -I../common

So it is indeed possible to run the examples on stock ROCm 1.2. If you could update the cmake files to compile the examples without any intervention (and presumably remove amdphdrs), it'd be great.