SebastianBoe

SebastianBoe's Stars

• chipsalliance/chisel

  Chisel: A Modern Hardware Design Language

  Language:Scala3.9k1491k589

• YosysHQ/yosys

  Yosys Open SYnthesis Suite

  Language:C++3.4k1381.7k872

• YosysHQ/icestorm

  Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)

  Language:Python98275133224

• skordal/potato

  A simple RISC-V processor for use in FPGA designs.

  Language:VHDL261242541

• ujamjar/hardcaml

  [Deprecated see github.com/janestreet/hardcaml] Register Transfer Level Hardware Design in OCaml

  Language:OCaml11818268

• ccelio/chisel-style-guide

  A Style Guide for the Chisel Hardware Construction Language

  10612213

• ducky64/chisualizer

  Block-diagram style digital logic visualizer

  Language:Python23614

• SebastianBoe/turborav

  A self-contained computer stack hobby project

  Language:Scala159122

• justin8/docker-makepkg

  Language:Shell12317