SheaCai

SheaCai's Stars

• CyC2018/CS-Notes

  :books: 技术面试必备基础知识、Leetcode、计算机操作系统、计算机网络、系统设计

  174k5.3k56350.8k

• youngyangyang04/leetcode-master

  《代码随想录》LeetCode 刷题攻略：200道经典题目刷题顺序，共60w字的详细图解，视频难点剖析，50余张思维导图，支持C++，Java，Python，Go，JavaScript等多语言版本，从此算法学习不再迷茫！🔥🔥 来看看，你会发现相见恨晚！🚀

  Language:Shell50.1k37923311.3k

• NVIDIA/FasterTransformer

  Transformer related optimization, including BERT, GPT

  Language:C++5.7k63624884

• Lyken17/pytorch-OpCounter

  Count the MACs / FLOPs of your PyTorch model.

  Language:Python4.8k30169526

• OAID/Tengine

  Tengine is a lite, high performance, modular inference engine for embedded device

  Language:C++4.6k229609998

• sksq96/pytorch-summary

  Model summary in PyTorch similar to `model.summary()` in Keras

  Language:Python4k37149412

• openmlsys/openmlsys-zh

  《Machine Learning Systems: Design and Implementation》- Chinese Version

  Language:TeX3.9k47202428

• microsoft/AI-System

  System for AI Education Resource.

  Language:Python3.4k6848421

• jcjohnson/cnn-benchmarks

  Benchmarks for popular CNN models

  Language:Python2.5k16331410

• drh/lcc

  The lcc retargetable ANSI C compiler

  Language:C2k10534436

• Xilinx/Vitis-AI

  Vitis AI is Xilinx’s development stack for AI inference on Xilinx hardware platforms, including both edge devices and Alveo cards.

  Language:Python1.4k761.3k622

• intel/llvm

  Intel staging area for llvm.org contribution. Home for Intel LLVM-based projects.

  Language:LLVM1.2k791.9k722

• google/xls

  XLS: Accelerated HW Synthesis

  Language:C++1.2k631.3k170

• microsoft/nnfusion

  A flexible and efficient deep neural network (DNN) compiler that generates high-performance executable from a DNN model description.

  Language:C++94643206157

• nebuly-ai/nos

  Module to Automatically maximize the utilization of GPU resources in a Kubernetes cluster through real-time dynamic partitioning and elastic quotas - Effortless optimization at its finest!

  Language:Go611133233

• chipsalliance/chisel-template

  A template project for beginning new Chisel work

  Language:Scala5645135177

• BRTResearch/AIChip_Paper_List

  561383112

• calyxir/calyx

  Intermediate Language (IL) for Hardware Accelerator Generators

  Language:Rust4681880746

• geniayuan/datasciencecoursera

  for Data Science class on Coursera

  41490124

• IBM/AccDNN

  A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.

  Language:Verilog3842514101

• eth-cscs/COSMA

  Distributed Communication-Optimal Matrix-Matrix Multiplication Algorithm

  Language:C++184216727

• abdelazeem201/Systolic-array-implementation-in-RTL-for-TPU

  IC implementation of Systolic Array for TPU

  Language:Verilog1292122

• mangpo/greenthumb

  Language:Racket821365

• StanfordAHA/Halide-to-Hardware

  Language:C++76215612

• ucb-bar/cosa

  A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)

  Language:Python7214817

• GATECH-EIC/AutoDNNchip

  Language:Python6611513

• pku-liang/TensorLib

  A Spatial Accelerator Generation Framework for Tensor Algebra.

  Language:Verilog48108

• StanfordVLSI/Genesis2

  A home for Genesis2 sources.

  Language:Perl3512111

• SheaCai/optimus

  This is the implementation of the paper [Optimus: Towards Optimal Layer-Fusion on Deep Learning Processors].

  Language:Python10106

• Jagadeepram/linear-equation-solver-DE1-SoC

  Accelerate Linear Equation System Solver on DE1-SoC development Board

  Language:C1