SiliconLabs/peripheral_examples

clock for EM01GRPACLK

silabs-DenverL opened this issue · 1 comments

/series2/iadc/iadc_scan_iadc_timer/src/main_scan_iadc_timer.c

for EFR32MG22 (BRD4182A), this use 80MHz for cmuClock_EM01GRPACLK.
seems this violate the datasheet, table 4.2 on page 19. the max for fEM01GRPBCLK is 76.8MHz

This issue is fixed in a6ae6d0. The clock source has been changed to HFXO from HFRCODPLL.