Agenda for sync meeting 1/8/2021
tlively opened this issue ยท 8 comments
The next meeting will be Friday, January 8 at 9:00AM - 10:00AM PST/ 6:00PM - 7:00PM CET. Please respond with agenda items you would like to discuss.
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Agenda so far:
- Q-format multiplication (#365) if we get x86-64 benchmarking results for it
- Sign select (#124) if @rrwinterton is able to look into its Alder Lake performance
- Expectations about engine optimizations
- Cost tuning methodology #404
If #395 is prototyped on x64/arm64 with the External References mechanism, I'd love to be able to discuss some results in this meeting.
We should revisit the instructions that reached provisional consensus at the last meeting and make sure everyone's on board. (I have no objections to these.)
Also, lets discuss untyped form of any_true
instruction (#416)
We should revisit the instructions that reached provisional consensus at the last meeting and make sure everyone's on board. (I have no objections to these.)
I don't have objections either. Sorry, took me a while to find the issue.
Sign select (#124) if @rrwinterton is able to look into its Alder Lake performance
I don't have data for Adler Lake, but per Instlatx64 dump Tremont core (Adler Lake predecessor) runs BLENDVPS
/BLENDVPD
/PBLENDVB
with latency of 3 and reciprocal throughput of 2, which is a substantial improvement over Goldmont (latency 4, rcp throughput 4), and is an improvement over the SSE2-level emulation sequence.
As we've had the new proposal freeze for some time now, I'd like to get add a discussion item for Phase 4 timeline/requirements.