Xilinx/finn-examples

Vivado project files for examples

siwave opened this issue · 1 comments

siwave commented

Are the Vivado projects for the pre-built examples available for download?

Thanks

Hi @siwave,

The Vivado projects aren't available for download. However, for each pre-built network example, we have provided steps to rebuild the bitfile, which can be found here. The Vivado project of the stitched-IP can then be found under $FINN_HOST_BUILD_DIR. Depending on which example network you're interested in and presuming you only want the Vivado project of the stitched-IP, you can add an additional flag called "stop_step" in the DataflowBuildConfig to run the build flow up until creating the stitched-IP. Since this depends slightly on the custom steps of the networks, I've listed which step generates the stitched-IP:

  • bnn-pynq, cybersecurity-mlp, kws, vgg10-radioml: "step_create_stitched_ip".
  • mobilenet-v1: "step_create_stitched_ip" when targeting Zynq platforms, "step_synthesize_bitfile" when targeting Alveo platforms.
  • resnet50: "step_synthesize_bitfile".

You would need to modify the build.py and add, for example for the bnn-pynq models, the line stop_step="create_stitched_ip" as part of the parameters of the DataflowBuildConfig.

Additionally, if you want to synthesize the stitched-IP, you can set the parameter enable_stitched_ip_synth=True in the DataflowBuildConfig. Note however that this will increase the execution time of the build flow.

Hope this helps!