YudiQiu's Stars
UDC-GAC/gem5McPATparse
Adapting gem5 output to McPAT input
pannotia/pannotia
Pannotia v0.9 is a suite of OpenCL graph applications
MatthiasJReisinger/PolyBenchC-4.2.1
PolyBench/C benchmark suite (version 4.2.1 beta) from http://web.cse.ohio-state.edu/~pouchet/software/polybench/
ramachav/Parallel_Computer_Architectures
Parallel Computer Architecture project at Purdue where I implemented Last-Touch Prediction, a self-invalidation scheme, to a MESI cache/directory coherence protocol in gem5. A 10% average improvement in program execution time was achieved for benchmarks in the SPLASH benchmark suite.
jkadlec/gem5-l3-mesif
MESIF cache coherency protocol for the GEM5 simulator
anthonygego/gem5-slicc-latex
gem5 SLICC HTML to LaTeX parser
cirosantilli/parsec-benchmark
PARSEC Benchmark http://parsec.cs.princeton.edu 3.0-beta-20150206 ported to Ubuntu 22.04 and with proper version control and SPLASH2 ported to Buildroot 2017.08 cross compilation (ARM, MIPS, etc.). This repo intends to support all build types and benchmarks. Test data stored on a release since the Princeton website died.
TencentCloud/O266player
openasic-org/xk265
xk265:HEVC/H.265 Video Encoder IP Core (RTL)
Wookai/paper-tips-and-tricks
Best practice and tips & tricks to write scientific papers in LaTeX, with figures generated in Python or Matlab.
melver/mc2lib
Memory consistency model checking and test generation library.
vineodd/PIMSim
PIMSim is a Process-In-Memory Simulator with the compatibility of GEM5 full-system simulation.
cdsc-github/parade-ara-simulator
PARADE: A Cycle-Accurate Full-System Simulation Platform for Accelerator-Rich Architectural Design and Exploration
gem5-graphics/gem5-graphics
gem5 simulator with a gpgpu+graphics GPU model
GHScan/TechNotes
Scan's personal technical notes
Coalfire-Research/Red-Baron
Automate creating resilient, disposable, secure and agile infrastructure for Red Teams.
jshun/ligra
Ligra: A Lightweight Graph Processing Framework for Shared Memory
excalidraw/excalidraw
Virtual whiteboard for sketching hand-drawn like diagrams
CMU-SAFARI/ramulator
A Fast and Extensible DRAM Simulator, with built-in support for modeling many different DRAM technologies including DDRx, LPDDRx, GDDRx, WIOx, HBMx, and various academic proposals. Described in the IEEE CAL 2015 paper by Kim et al. at http://users.ece.cmu.edu/~omutlu/pub/ramulator_dram_simulator-ieee-cal15.pdf
umd-memsys/DRAMSim2
DRAMSim2: A cycle accurate DRAM simulator
SimpleSSD/SimpleSSD-FullSystem
Open-Source Licensed Educational SSD Simulator for High-Performance Storage and Full-System Evaluations
firesim/firesim
FireSim: Fast and Effortless FPGA-accelerated Hardware Simulation with On-Prem and Cloud Flexibility
SEAL-UCSB/NVmain
NVMain - An Architectural Level Main Memory Simulator for Emerging Non-Volatile Memories
RCSL-HKUST/heterosim
HeteroSim is a full system simulator supporting x86 multicore processors combined with a FPGA via bus-based architecture. Flexible design space exploration is enabled by a wide range of system configurations. A complete simulation flow with compiler support is provided so that a full system simulation can be performed with various performance metrics returned.
gpgpu-sim/gpgpu-sim_distribution
GPGPU-Sim provides a detailed simulation model of contemporary NVIDIA GPUs running CUDA and/or OpenCL workloads. It includes support for features such as TensorCores and CUDA Dynamic Parallelism as well as a performance visualization tool, AerialVisoin, and an integrated energy model, GPUWattch.
harvard-acc/ALADDIN
A pre-RTL, power-performance model for fixed-function accelerators
harvard-acc/gem5-aladdin
End-to-end SoC simulation: integrating the gem5 system simulator with the Aladdin accelerator simulator.
tukl-msd/gem5.TnT
gem5 Tips & Tricks
gem5-gpu/gem5-gpu
cyjseagull/gem5-nvmain-hybrid-simulator
gem5-nvmain hybrid simulator supporting simulation of DRAM-NVM hybrid memory system