The project is designed to take an (iCE40) binary image, named flash_image.bin and placed in the main directory, and ...
- Unpack it
- Reformat it as a Verilog .v file
- Run Verilator on that .v file
- Add a main program to the file
- Simulate the file as if it were run in actual hardware.
The project contains simulation files for both a serial port
as well as a Quad SPI flash. A single GPIO wire, o_done,
may also be set to end the simulation. See the .pcf for
example I/O connections to both the Serial port and the Quad SPI flash devices.
To use:
- Arrange your design so that your I/O ports include those listed in the pcf file.
- Place your binary image in the main directory
- Run make
This project depends upon make, binutils, g++, sed, Verilator, and icestorm for proper functionality.
This project is copyrighted by Gisselquist Technology, LLC. It is licensed under the LGPL.