intrinsics for CPUs not supporting AVX
Closed this issue · 3 comments
akielaries commented
Look into support for SSE and AVX intrinsics for supporting x86 platforms.
akielaries commented
Since many processors support many instruction sets like MMX, SSE, SSE2, SSE3, AVX, AVX2... determine how to use the highest order (those seem to be the fastest due to increased register widths)
akielaries commented
include individual headers of ISAs instead of immintrin as a whole?
akielaries commented
benchmark vs OpenBLAS. openGPMP out performs on Skylake but not Xeon except gpmp fortran routines... dig into this