alexforencich/verilog-ethernet

Issues

• Adding additional Platform support

  #234 opened 8 days ago by jpalmer904
  0

• Deembedded Blockdesign Arty A7 Echo-Server

  #233 opened a month ago by Felolie
  1

• export to ku060

  #229 opened 2 months ago by andylgh
  6

• ExaNIC_X10 problem

  #230 opened a month ago by andylgh
  0

• No rule to make target

  #228 opened 2 months ago by pitpg
  0

• ADM-PCIE-9V3 example not working

  #224 opened 2 months ago by harris-chris
  4

• Wrong bit with on 10G MAC Tx start_packet_reg

  #226 opened 2 months ago by drewranck
  0

• multiple UDP stream support

  #225 opened 2 months ago by lizajoseph
  0

• 1G RGMII on KR260

  #164 opened a year ago by russell-t
  12

• Defining the ethernet frame in verilog testbench

  #220 opened 3 months ago by casager
  4

• Error run make project for KC705 board

  #222 opened 3 months ago by saman-coder
  1

• FPGA not reacting to ARP response?

  #221 opened 3 months ago by cube1us
  0

• I dream of one day seeing fq_codel (rfc8290) deeply embedded in an ethernet switch

  #219 opened 3 months ago by dtaht
  0

• About 10g ethernet

  #217 opened 3 months ago by LiShuang-codes
  4

• Eth

  #216 opened 4 months ago by Tiaan1991
  0

• Link to Icarus Verilog in Readme returns Error 404

  #213 opened 4 months ago by cube1us
  0

• Translate data from AXI to ethernet

  #211 opened 5 months ago by thocaptain
  0

• SGMII design in Stratix 10 using Gx bank

  #205 opened 7 months ago by fpgapsyc
  6

• Bug in udp_checksum_gen

  #206 opened 7 months ago by SebastianSchelle
  0

• Jumbo Frame Support - Not Working

  #204 opened 7 months ago by abu7770
  2

• `test_ip_eth_tx_64.py` hangs

  #203 opened 7 months ago by EdwinEstep
  4

• How to simulate and test the verilog-ethernet design?

  #197 opened 9 months ago by lizajoseph
  6

• How to download and install Icarus Verilog in linux environment?

  #202 opened 7 months ago by lizajoseph
  1

• Is there a block diagram available for the UDP echo server design ?

  #201 opened 8 months ago by lizajoseph
  0

• Unreachable code in ip_eth_tx_64.v

  #199 opened 8 months ago by MKCompu
  1

• Can this design be validated on Alveo u50 card ?

  #196 opened 9 months ago by lizajoseph
  9

• UDP flow

  #191 opened 9 months ago by anushkaASB
  1

• How To Trigger ARP Mechanism?

  #194 opened 9 months ago by yunusesergun
  2

• UDP flow

  #190 opened 9 months ago by anushkaASB
  0

• VCU 128 Support!

  #187 opened 10 months ago by ABDELRAHMAN123491
  3

• Misalignment/Deadlock in udp_checksum_gen_64.v

  #186 opened 10 months ago by seldompopup
  0

• ExaNIC_X10

  #188 opened 10 months ago by SrodinW
  4

• Does this 10G ethernet library use pause frames for flow control?

  #185 opened a year ago by myqlee
  4

• PHY MAC latency

  #181 opened a year ago by infamalex
  1

• Can this IP support 100G Ethernet?

  #184 opened a year ago by ChomperT
  1

• There is no data return in ZCU106 example design

  #180 opened a year ago by JLFu
  2

• NetFPGA_SUME for kintex ultrascale

  #177 opened a year ago by SrodinW
  2

• Bug in ssio_sdr_in_diff.v

  #182 opened a year ago by AlexLao512
  0

• Difficulties in putting the DE2-115 example into operation

  #176 opened a year ago by Sch-Tim
  0

• Question - Verilog-Ethernet vs 1G/2.5G Ethernet Subsystem

  #173 opened a year ago by Beauxrel
  2

• Question about the project coding style

  #172 opened a year ago by danieldanino17
  0

• I want to send custom data, how should I modify the program?

  #170 opened a year ago by qwer872336019
  0

• Will 100M/1G be supported?

  #161 opened a year ago by shenkyw
  3

• Ethernet Mac micro architecture

  #165 opened a year ago by Saurav678910
  0

• Modified example seems to not work

  #163 opened a year ago by OroArmor
  2

• Any codes for realizing 64B/66B to 256B/257B Transcoder?

  #160 opened a year ago by guetZhou
  1

• How can we apply zcu102 example project for all SFP port?

  #158 opened a year ago by ahmetserdar
  5

• Create IP for the Alveo U280

  #159 opened a year ago by ncppd
  3

• How can we use verilog ethernet on zcu102?

  #156 opened a year ago by ahmetserdar
  0

• ip_64 flushes one payload transfer too many after ARP cache miss

  #155 opened a year ago by paul-demo
  2