Optimize Control Loops #1
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areiter128 commented
Optimize ISR Time
- Type: Low Level System Feature
- Priority: Medium/Low
CPU load of control loops take more than 70% CPU load and result in colliding ADC triggers and control loop execution. These issues force us to step down control frequency to 87.5 kHz. Design target would be 175 kHz. This target was nice to have but 87.5 kHz might be good enough to meet PD requirements. Thus priority is lower.