Adressing > 4GB

[carmaa]

When using a hex-value for the start address there is no way to
effectively use an address over 4 GiB:

            if '0x' in start:
                start = int(start, 0) & 0xfffff000 # Address

that's a bit inconsistent, when start is entered as pages there is no
such check.

            else:
                start = int(start) * cfg.PAGESIZE # Page number

[Manouchehri]

@carmaa I'm probably missing something, but can't PCIe devices be in a 64-bit MMIO now?

On real hardware, and under pHyp, the PCI host bridges on Power machines
typically advertise two outbound MMIO windows from the guest's physical
memory space to PCI memory space:

• A 32-bit window which maps onto 2GiB..4GiB in the PCI address space
• A 64-bit window which maps onto a large region somewhere high in PCI
  address space (traditionally this used an identity mapping from guest
  physical address to PCI address, but that's not always the case)

The qemu implementation in spapr-pci-host-bridge, however, only supports a
single outbound MMIO window, however. At least some Linux versions expect
the two windows however, so we arranged this window to map onto the PCI
memory space from 2 GiB..~64 GiB, then advertised it as two contiguous
windows, the "32-bit" window from 2G..4G and the "64-bit" window from
4G..~64G.

Source: https://lists.gnu.org/archive/html/qemu-devel/2016-10/msg00894.html