cornell-zhang/heterocl

Support data movement to on-chip memory space

Closed this issue · 2 comments

HCL has the support of data movement to any memory space that is shared between host and accelerator, i.e. DRAM and HBM. Aside from that, we should also provide the options to move data to a specific on-chip memory space. e.g. BRAM , LUTRAM (distributed RAM), URAM, or register files.

Currently, we only support creating on-chip buffer for the input argument -- the on-chip buffer is created to fetch the data from off-chip memory in the burst mode. This burst buffer is only accessible from the FPGA side and is by default implemented using BRAM.

I am considering using a new API s.bind() to bind certain variables or tensors to specific memory space, like what has been done in Vivaod HLS pragma syntax. Or we can just reuse the .to() primitive.

// python interface 
s.bind(temp, hcl.FPGA.BRAM, port=2, read_only=False)

// generated HLS code
int temp;
#pragma HLS RESOURCE variable=temp core=RAM_2P_BRAM

Closed duplicate #280.

Feature added. But the interface is not changed. To move a tensor to on-chip buffer, the programmers still use .to. And example as followed

s.to(tensor, p.xcel.BRAM)

Test cases available here: https://github.com/cornell-zhang/heterocl/blob/heteroflow/tests/issues/test_issue_281.py