Pinned Repositories
2022-bishkek
tt08-schoolriscv-cpu-with-fibonacci-program
Submission for Tiny Tapeout 8 - Verilog HDL Projects. A minimalistic SoC with a schoolRISCV educational CPU and a ROM memory with a program that computes the Fibonacci numbers.
yrv-plus
Verilog implementation of RISC-V: RV32IAC plus much of B. 32-bit or 16-bit bus.
Digital Design & Verification in Central Asia's Repositories
ddvca/tt08-schoolriscv-cpu-with-fibonacci-program
Submission for Tiny Tapeout 8 - Verilog HDL Projects. A minimalistic SoC with a schoolRISCV educational CPU and a ROM memory with a program that computes the Fibonacci numbers.
ddvca/2022-bishkek
ddvca/yrv-plus
Verilog implementation of RISC-V: RV32IAC plus much of B. 32-bit or 16-bit bus.