deilt

deilt's Stars

• pConst/basic_verilog

  Must-have verilog systemverilog modules

  Language:Verilog1.6k379

• aolofsson/oh

  Verilog library for ASIC and FPGA designers

  Language:Verilog1.2k286

• OSCPU/NutShell-doc

  11527

• OSCPU/NutShell

  RISC-V SoC designed by students in UCAS

  Language:Scala1.4k240

• riscv/riscv-debug-spec

  Working Draft of the RISC-V Debug Specification Standard

  Language:Python45792

• qing-2/CPU

  单周期 8指令 MIPS32CPU

  Language:Verilog8315

• hamsternz/Rudi-RV32I

  A rudimental RISCV CPU supporting RV32I instructions, in VHDL

  Language:VHDL11716

• algorithm-visualizer/algorithm-visualizer

  :fireworks:Interactive Online Platform that Visualizes Algorithms from Code

  Language:JavaScript46.7k7.3k

• XUANTIE-RV/wujian100_open

  IC design and development should be faster，simpler and more reliable

  Language:Verilog1.9k572

• shining-spring/nvlda

  Language:Python4

• olofk/serv

  SERV - The SErial RISC-V CPU

  Language:Verilog1.4k188

• raysalemi/uvmprimer

  Contains the code examples from The UVM Primer Book sorted by chapters.

  Language:SystemVerilog482204

• adki/AMBA_AXI_AHB_APB

  AMBA bus lecture material

  Language:Verilog373125

• khvysofq/proxyer

  试用地址 http://test.proxyer.cn:6789/ 访问密码：12345678

  26155

• MarcusNg/flutter_covid_dashboard_ui

  Language:Dart15099

• rclone/rclone

  "rsync for cloud storage" - Google Drive, S3, Dropbox, Backblaze B2, One Drive, Swift, Hubic, Wasabi, Google Cloud Storage, Azure Blob, Azure Files, Yandex Files

  Language:Go47k4.2k

• SoftEtherVPN/SoftEtherVPN

  Cross-platform multi-protocol VPN software. Pull requests are welcome. The stable version is available at https://github.com/SoftEtherVPN/SoftEtherVPN_Stable.

  Language:C11.6k2.6k

• jhao104/proxy_pool

  Python ProxyPool for web spider

  Language:Python21.5k5.2k