Idea: Alternate operating mode which alters FP precision
HadrienG2 opened this issue · 2 comments
I am not sure if this could fall into the scope of Verrou, but if not maybe it could be food for thought for the associated Interflop project.
Most hardware architectures these days either favor (from a performance point of view) or outright mandate use of single-precision floating-point arithmetic. But most numerical algorithms are written in double precision as a safe default. Porting such algorithms to single precision usually involves a tedious process of locating and working on the code regions which are sensitive to use of reduced-precision arithmetic.
In principle, Verrou could help at this by offering an alternate operating mode where instead of twiddling the IEEE-754 rounding mode, it performs operations in reduced precision then casts back to the original floating-point format.
By integrating this functionality with delta-debugging, one could then easily locate which functions or code regions are most sensitive to use of reduced precisions. The double rounding would make this approach somewhat pessimistic with respect to an actual double -> float substitution in the code, but at least it could act as a good starting point for locating the precision-sensitive regions of the code.
What do you think about this idea?
We already have these kinds of ideas in mind ... so we like it. Indeed it is a good way to convince developers to use verrou. If your code is not stable, verrou will help you to correct it and if your code is stable verrou will help you to improve performance (computational time). For now it is not scheduled with high priority because we prefer to correct instable code before doing optimization of stable ones. Nevertheless there is a workaround : you can apply delta-debug on the wall code converted in float (usually easy in C++).
Anecdotally we got the idea of delta-debugging for localization thanks to the work with Promise (tools based on cadna to exhibit mixed precision configuration).