elhep/AFCZ

Issues

• v2.1 changelog

  #158 opened a year ago by filipswit
  0

• v2.1 changes and wishlist

  #157 opened a year ago by filipswit
  2

• MGT CLK overdrive

  #156 opened 4 years ago by gkasprow
  1

• changelog v2.0

  #155 opened 4 years ago by gkasprow
  3

• shorted signals in PM part

  #154 opened 4 years ago by gkasprow
  1

• FMC2_CLK.CLK2_BIDIR has three start/endpoints

  #123 opened 4 years ago by marmeladapk
  1

• Directionality of IC57

  #153 opened 4 years ago by marmeladapk
  0

• Missing file when opening project cloned from git

  #152 opened 4 years ago by marmeladapk
  0

• Why is ETH1 MII CRS shorted with RX_DV?

  #113 opened 4 years ago by marmeladapk
  1

• Flash memory for user data connected to PL

  #150 opened 4 years ago by kaolpr
  8

• I2C address map

  #129 opened 4 years ago by marmeladapk
  0

• Reducing BoM count

  #147 opened 4 years ago by marmeladapk
  5

• BoM - Availability

  #148 opened 4 years ago by marmeladapk
  1

• Connect reset of GPIO expander to P3V3 through pullup

  #125 opened 4 years ago by marmeladapk
  3

• String "ADD VARIANT with C988"

  #143 opened 4 years ago by marmeladapk
  1

• VCU supply should be 0V9 not 0V85

  #144 opened 4 years ago by marmeladapk
  3

• Is this hole necessary?

  #151 opened 4 years ago by filipswit
  1

• Add outputjob file

  #146 opened 4 years ago by marmeladapk
  0

• Why are there two RGMII ETHs connected to the PS?

  #114 opened 4 years ago by marmeladapk
  1

• Why is R641 DNPed?

  #117 opened 4 years ago by marmeladapk
  2

• Clean up VDDO connections of Si5341

  #120 opened 4 years ago by marmeladapk
  0

• Clean up pudc and por override connections

  #130 opened 4 years ago by marmeladapk
  0

• DNP R355 or TR1

  #126 opened 4 years ago by marmeladapk
  0

• P5_MODE[2:0] is 0x2 not 0x1 (MII MAC not MII PHY)

  #112 opened 4 years ago by marmeladapk
  2

• Swap FB_IN with Si5341 OUT9 for zero-delay mode

  #118 opened 4 years ago by marmeladapk
  0

• GTX_CLK_CUST2C is AC coupled twice

  #121 opened 4 years ago by marmeladapk
  0

• Consider connecting dedicated SYSMON pins to I2C bus

  #138 opened 4 years ago by marmeladapk
  0

• PS_SRST should be pulled up not down

  #133 opened 4 years ago by marmeladapk
  0

• Connect PS_ERROR_OUT and PS_ERROR_STATUS to MMC

  #139 opened 4 years ago by marmeladapk
  0

• Bank 87 does not support differential standards at 3V3

  #140 opened 4 years ago by marmeladapk
  2

• Move RTM_GTP.GTP0-3_CLK_IN to clock capable pins

  #142 opened 4 years ago by marmeladapk
  0

• Bank 66 supports LVDS input so termination resistor is not needed

  #141 opened 4 years ago by marmeladapk
  0

• CDR_CLK_CTRL.SI5324_INT_ALM isn't connected

  #124 opened 4 years ago by marmeladapk
  0

• Add ground port on pin 36 of IC23

  #111 opened 4 years ago by marmeladapk
  0

• FMC CLK DIR should have 100k pulldown to GND

  #127 opened 4 years ago by marmeladapk
  0

• Connect VREFP and VREFN to GNDADC

  #134 opened 4 years ago by marmeladapk
  0

• Connect GND_PSADC to GNDADC

  #135 opened 4 years ago by marmeladapk
  0

• Connect Vp and Vn to GNDADC

  #137 opened 4 years ago by marmeladapk
  0

• Reduce pullup strength on SDA/SCL0..7

  #128 opened 4 years ago by marmeladapk
  0

• Use stronger pullup on PS_MODE

  #131 opened 4 years ago by marmeladapk
  0

• MLVDS_RE is active low

  #110 opened 4 years ago by marmeladapk
  0

• MLVDS_AMC_PORTS.Rx18 has wrong polarity on IC13

  #109 opened 4 years ago by marmeladapk
  0

• Si57x PL direct I2C

  #149 opened 4 years ago by kaolpr
  0

• Add 100nF to PSADC VCC and VCCADC

  #136 opened 4 years ago by marmeladapk
  0

• Change R512 to 4k7

  #132 opened 4 years ago by marmeladapk
  0

• IC71 doesn't have a decoupling capacitor

  #145 opened 4 years ago by marmeladapk
  0

• Clock polarity is swapped on clock switch

  #122 opened 4 years ago by marmeladapk
  0

• Clock management schematic has no DNPed parts

  #116 opened 4 years ago by marmeladapk
  1

• R296 is not neccecary, FPGA can terminate the clock

  #119 opened 4 years ago by marmeladapk
  2

• PS doesn't have access to INTn signal of ETH switch

  #115 opened 4 years ago by marmeladapk
  1