How to integrate Zigbee Bridge and Thread Border Router functions on ESP32-S3 board (CON-1226)
Askidea opened this issue · 5 comments
Describe the question/query that you have
I am working on merging the example codes from the esp-matter and esp-thread-br repositories to make the Matter Zigbee Bridge and the Thread Border Router function operate simultaneously on the ESP32-S3 board. Based on the zigbee_bridge code in esp-matter, I merged what I thought was necessary among the basic_thread_border_router sources in esp-thread-br. The ESP32-S3 was tested in both ways: using a Border router devkit board (Zigbee gateway board) and using a stand alone board.
I succeeded in integrating the source code and building it, but an error occurred while running. This error occurred while initializing the openthread stack inside the function while calling esp_matter::start() in app_main() of zigbee_bridge. The cause was found to be related to the enabled/disabled setting of "Top -> Component config -> OpenThread" in menuconfig.
The OpenThread menu item was not checked in zigbee_bridge's menuconfig, but this item had to be checked in basic_thread_border_router, so a conflict was occurring.
Environment
- ESP-Matter Commit Id: 6410ea9
- ESP-IDF Commit Id: 3d813af
- esp-thread-br Commit Id: 54b9549
- SoC : ESP32-S3 & H2, Zigbee gateway devkit (Border router devkit)
- Device Logs (Please attach the log file):
- Host Machine OS: Ubuntu 22.04 LTS
- Commissioner app and versions if present:
- Commissioner's logs if present:
Additional context
I would like to ask a few questions regarding this.
Q1. Is it possible to have the Matter Zigbee Bridge task and the Thread Border Router task run simultaneously on the ESP32-S3 board?
Q2. When building the zigbee_bridge source by merging the basic_thread_border_router source in the esp-matter repository and running it on the Zigbee gateway devkit (S3 with 4MB flash), the following error occurred. Is there any way to solve this?
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0xc (RTC_SW_CPU_RST),boot:0x8 (SPI_FAST_FLASH_BOOT)
Saved PC:0x40375a11
0x40375a11: esp_restart_noos at /home/kskim/github/espressif/esp-idf/components/esp_system/port/soc/esp32s3/system_internal.c:158
SPIWP:0xee
mode:DIO, clock div:1
load:0x3fce2810,len:0x178c
load:0x403c8700,len:0x4
load:0x403c8704,len:0xc10
load:0x403cb700,len:0x2dac
entry 0x403c8904
I (26) boot: ESP-IDF v5.4-dev-12-g3d813afa01-dirty 2nd stage bootloader
I (26) boot: compile time Jun 25 2024 20:43:40
I (26) boot: Multicore bootloader
I (27) boot: chip revision: v0.2
I (27) boot.esp32s3: Boot SPI Speed : 80MHz
I (27) boot.esp32s3: SPI Mode : DIO
I (27) boot.esp32s3: SPI Flash Size : 4MB
I (27) boot: Enabling RNG early entropy source...
I (28) boot: Partition Table:
I (28) boot: ## Label Usage Type ST Offset Length
I (28) boot: 0 esp_secure_cert unknown 3f 06 0000d000 00002000
I (29) boot: 1 nvs WiFi data 01 02 00010000 0000e000
I (29) boot: 2 nvs_keys NVS keys 01 04 0001e000 00001000
I (29) boot: 3 otadata OTA data 01 00 0001f000 00002000
I (30) boot: 4 phy_init RF data 01 01 00021000 00001000
I (30) boot: 5 factory factory app 00 00 00030000 00271000
I (31) boot: 6 fctry WiFi data 01 02 002a1000 00006000
I (31) boot: 7 zb_storage Unknown data 01 81 002a7000 00020000
I (31) boot: 8 zb_fct Unknown data 01 81 002c7000 00001000
I (32) boot: 9 web_storage Unknown data 01 82 002c8000 00019000
I (32) boot: 10 rcp_fw Unknown data 01 82 002e1000 000a0000
I (33) boot: End of partition table
I (33) boot: Defaulting to factory image
I (33) esp_image: segment 0: paddr=00030020 vaddr=3c1d0020 size=77d88h (490888) map
I (122) esp_image: segment 1: paddr=000a7db0 vaddr=3fc9ca00 size=06250h ( 25168) load
I (127) esp_image: segment 2: paddr=000ae008 vaddr=40374000 size=02010h ( 8208) load
I (129) esp_image: segment 3: paddr=000b0020 vaddr=42000020 size=1ca57ch (1877372) map
I (466) esp_image: segment 4: paddr=0027a5a4 vaddr=40376010 size=169a0h ( 92576) load
I (497) boot: Loaded app from partition at offset 0x30000
I (498) boot: Disabling RNG early entropy source...
I (498) cpu_start: Multicore app
I (508) cpu_start: Pro cpu start user code
I (508) cpu_start: cpu freq: 160000000 Hz
I (508) app_init: Application information:
I (508) app_init: Project name: otbr_zigbee_bridge
I (509) app_init: App version: 1.0
I (509) app_init: Compile time: Jun 26 2024 15:54:50
I (509) app_init: ELF file SHA256: 32a423d70...
I (509) app_init: ESP-IDF: v5.4-dev-12-g3d813afa01-dirty
I (510) efuse_init: Min chip rev: v0.0
I (510) efuse_init: Max chip rev: v0.99
I (510) efuse_init: Chip rev: v0.2
I (510) heap_init: Initializing. RAM available for dynamic allocation:
I (511) heap_init: At 3FCC44A0 len 00025270 (148 KiB): RAM
I (511) heap_init: At 3FCE9710 len 00005724 (21 KiB): RAM
I (511) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (511) heap_init: At 600FE100 len 00001EE8 (7 KiB): RTCRAM
I (513) spi_flash: detected chip: generic
I (513) spi_flash: flash io: dio
I (514) sleep: Configure to isolate all GPIO pins in sleep state
I (515) sleep: Enable automatic switching of GPIO sleep configuration
I (515) coexist: coex firmware version: 7fff68fa5
I (516) coexist: coexist rom version e7ae62f
I (516) main_task: Started on CPU0
I (526) main_task: Calling app_main()
I (556) app_main: app_main() check 1 >>>>>>>
I (566) app_main: app_main() check 2 >>>>>>>
I (566) app_main: app_main() check 3 >>>>>>>
I (566) esp_matter_core: start() check 1 >>>>>>>
I (566) esp_matter_core: start() CHIP_DEVICE_CONFIG_ENABLE_WIFI check 2 >>>>>>>
I (566) pp: pp rom version: e7ae62f
I (566) net80211: net80211 rom version: e7ae62f
I (576) wifi:wifi driver task: 3fcd11ac, prio:23, stack:6144, core=0
I (576) wifi:wifi firmware version: 34d9141e9
I (576) wifi:wifi certification version: v7.0
I (576) wifi:config NVS flash: enabled
I (576) wifi:config nano formating: enabled
I (576) wifi:Init data frame dynamic rx buffer num: 32
I (576) wifi:Init static rx mgmt buffer num: 5
I (576) wifi:Init management short buffer num: 32
I (586) wifi:Init dynamic tx buffer num: 32
I (586) wifi:Init static tx FG buffer num: 2
I (586) wifi:Init static rx buffer size: 1600
I (586) wifi:Init static rx buffer num: 10
I (586) wifi:Init dynamic rx buffer num: 32
I (586) wifi_init: rx ba win: 6
I (586) wifi_init: accept mbox: 6
I (586) wifi_init: tcpip mbox: 32
I (586) wifi_init: udp mbox: 6
I (586) wifi_init: tcp mbox: 6
I (586) wifi_init: tcp tx win: 5760
I (586) wifi_init: tcp rx win: 5760
I (586) wifi_init: tcp mss: 1440
I (586) wifi_init: WiFi IRAM OP enabled
I (586) wifi_init: WiFi RX IRAM OP enabled
I (586) esp_matter_core: start() check 3 >>>>>>>
I (586) esp_matter_core: chip_init() check START >>>>>>>
I (586) esp_matter_core: chip_init() check 1 >>>>>>>
I (606) chip[DL]: NVS set: chip-counters/reboot-count = 8 (0x8)
I (606) chip[DL]: Real time clock set to ld (1070365208/946684800/00 100:00:01 UTC)
I (606) esp_matter_core: chip_init() check 2 >>>>>>>
I (606) BLE_INIT: BT controller compile version [c23ab4c]
I (606) esp_matter_core: chip_init() check 3 >>>>>>>
I (606) esp_matter_core: chip_init() check 4 >>>>>>>
I (606) esp_matter_core: chip_init() check 5 >>>>>>>
Guru Meditation Error: Core 0 panic'ed (LoadProhibited). Exception was unhandled.
Core 0 register dump:
PC : 0x420d1f93 PS : 0x00060030 A0 : 0x820d0e6c A1 : 0x3fcc79c0
0x420d1f93: esp_openthread_platform_init at /home/kskim/github/espressif/esp-idf/components/openthread/src/esp_openthread_platform.cpp:127
A2 : 0x00000000 A3 : 0x00000000 A4 : 0x3fc9efe4 A5 : 0x0000000c
A6 : 0x0000000b A7 : 0x00000004 A8 : 0x821c995a A9 : 0x3fcc7900
A10 : 0x00000000 A11 : 0xffffffff A12 : 0x3fcc7950 A13 : 0x00000000
A14 : 0x00000003 A15 : 0x3fce0174 SAR : 0x0000001e EXCCAUSE: 0x0000001c
EXCVADDR: 0x00000000 LBEG : 0x40056f5c LEND : 0x40056f72 LCOUNT : 0x00000000
0x40056f5c: memcpy in ROM
0x40056f72: memcpy in ROM
Backtrace: 0x420d1f90:0x3fcc79c0 0x420d0e69:0x3fcc79f0 0x420b1eb2:0x3fcc7a20 0x420a0f9b:0x3fcc7a60 0x4200e255:0x3fcc7a80 0x42009159:0x3fcc7ab0 0x421c87eb:0x3fcc7bb0
0x420d1f90: esp_openthread_platform_init at /home/kskim/github/espressif/esp-idf/components/openthread/src/esp_openthread_platform.cpp:126
0x420d0e69: esp_openthread_init at /home/kskim/github/espressif/esp-idf/components/openthread/src/esp_openthread.cpp:69
0x420b1eb2: openthread_init_stack() at /home/kskim/github/espressif/esp-matter/examples/otbr_zigbee_bridge/build/esp-idf/chip/../../../../../connectedhomeip/connectedhomeip/config/esp32/third_party/connectedhomeip/src/platform/ESP32/OpenthreadLauncher.cpp:163
0x420a0f9b: chip::DeviceLayer::ThreadStackManagerImpl::_InitThreadStack() at /home/kskim/github/espressif/esp-matter/examples/otbr_zigbee_bridge/build/esp-idf/chip/../../../../../connectedhomeip/connectedhomeip/config/esp32/third_party/connectedhomeip/src/platform/ESP32/ThreadStackManagerImpl.cpp:55
0x4200e255: chip::DeviceLayer::ThreadStackManager::InitThreadStack() at /home/kskim/github/espressif/esp-matter/connectedhomeip/connectedhomeip/src/include/platform/ThreadStackManager.h:238
(inlined by) chip_init at /home/kskim/github/espressif/esp-matter/components/esp_matter/esp_matter_core.cpp:1000
(inlined by) esp_matter::start(void (*)(chip::DeviceLayer::ChipDeviceEvent const*, int), int) at /home/kskim/github/espressif/esp-matter/components/esp_matter/esp_matter_core.cpp:1075
0x42009159: app_main at /home/kskim/github/espressif/esp-matter/examples/otbr_zigbee_bridge/main/app_main.cpp:212
0x421c87eb: main_task at /home/kskim/github/espressif/esp-idf/components/freertos/app_startup.c:208
Q3. When I uploaded and ran the integrated binary built in Q2 to S3 (8MB) in the form of a stand alone devkit, the following error occurred. After booting, the reset phenomenon appears to repeat infinitely. What is the cause?
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x1 (POWERON),boot:0x8 (SPI_FAST_FLASH_BOOT)
SPIWP:0xee
mode:DIO, clock div:1
load:0x3fce2810,len:0x178c
load:0x403c8700,len:0x4
load:0x403c8704,len:0xc10
load:0x403cb700,len:0x2dac
entry 0x403c8904
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0xc (RTC_SW_CPU_RST),boot:0x8 (SPI_FAST_FLASH_BOOT)
Saved PC:0x403759cd
0x403759cd: esp_restart_noos at /home/kskim/github/espressif/esp-idf/components/esp_system/port/soc/esp32s3/system_internal.c:158
SPIWP:0xee
mode:DIO, clock div:1
load:0x3fce2810,len:0x178c
load:0x403c8700,len:0x4
load:0x403c8704,len:0xc10
load:0x403cb700,len:0x2dac
entry 0x403c8904
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0xc (RTC_SW_CPU_RST),boot:0x8 (SPI_FAST_FLASH_BOOT)
Saved PC:0x403759cd
0x403759cd: esp_restart_noos at /home/kskim/github/espressif/esp-idf/components/esp_system/port/soc/esp32s3/system_internal.c:158
We have run the ZigBee Gateway(Bridge) and Thread Border Router simultaneously on one S3 + one H2 board with an internal branch, but there are still some MRs to be merged in ESP-IDF about spinel changes and multi PAN support for this feature. Note that there is a limitation for running Zigbee Gateway and border router with only one H2, the channel for Thread network and zigbee network should be the same as there is only one radio on H2.
@wqx6
Couldn't I refer to the internal branch you mentioned? It seems that simply merging the basic_thread_border_router code and configurations with the zigbee_bridge does not solve the problem, and deep knowledge of the ESP SDK is needed to solve this issue.
You could not simply merging the basic_thread_border_router code and configurations with the zigbee_bridge to use them simultaneously, since both the ZigbeeBridge and TBR will use ESP32-H2 as RCP, but the RCP firmware on ESP32-H2 for Zigbee bridge is different from the one for TBR, we are going to release a new RCP firmware based on Spinel protocol and the RCP can be use for both the Zigbee bridge and TBR. and then we will make the host of Zigbee bridge uses Spinel to transmit the Zigbee packets to the RCP. Currently it is not Spinel.
If you want to require the branch that can be used for integrating TBR and Zigbee Bridge, you can reach our business team for it https://www.espressif.com/en/contact-us/technical-inquiries
You could not simply merging the basic_thread_border_router code and configurations with the zigbee_bridge to use them simultaneously, since both the ZigbeeBridge and TBR will use ESP32-H2 as RCP, but the RCP firmware on ESP32-H2 for Zigbee bridge is different from the one for TBR, we are going to release a new RCP firmware based on Spinel protocol and the RCP can be use for both the Zigbee bridge and TBR. and then we will make the host of Zigbee bridge uses Spinel to transmit the Zigbee packets to the RCP. Currently it is not Spinel.
I tried connecting ot_rcp(esp-idf v5.1) running on H2 to each zigbee_bridge(esp-matter & idf v5.4) and basic_thread_border_router(esp-thread-br & idf v5.4). And I confirmed that Matter and Zigbee devices were controlled. Looking at this, it seems that the Zigbee bridge also supports the Spinel interface.