ARCv2 kernel: Failing to boot in arc64 branch
vineetgarc opened this issue · 2 comments
With ARC64 software up - I was curious to see how hackbench performs in this minimal / non-optimized system. To compare we needed to test ARCv2 (preferably in same tree so generic improvement such as relaxed atomics / generic strncpy etc applies to ARCv2 as well for a fair comparison)
However ARCv2 kernel on tip of arc64 branch is failing to boot on HAPS / HSDK.
This architecture does not have kernel memory protection.
Run /init as init process
with arguments:
/init
with environment:
HOME=/
TERM=linux
potentially unexpected fatal signal 11.
Path: /bin/busybox
CPU: 0 PID: 1 Comm: init Not tainted 5.6.0-00119-g10d2a0b8c1ac #190
Invalid Read @ 0x00000004 by insn @ 0x200029e6
@off 0x29e6 in [/lib/ld-2.34.so] VMA: 0x20000000 to 0x2001c000
ECR: 0x00050100 EFA: 0x00000004 ERET: 0x200029e6
STAT32: 0x80081882 [IE U ] BTA: 0x200029dc
SP: 0x5ffffee0 FP: 0x5ffffee0 BLK: 0x20001f86
LPS: 0x00000010 LPE: 0x00000080 LPC: 0x00000000
r00: 0x5fffff10 r01: 0x00000000 r02: 0x2001ff7c
r03: 0x00000000 r04: 0x00000000 r05: 0x00000000
r06: 0x00000000 r07: 0x00000000 r08: 0x00000000
r09: 0x00000000 r10: 0x00000000 r11: 0x00000000
r12: 0x00000000 r13: 0x00000000 r14: 0x00000000
r15: 0x00000000 r16: 0x5fffff10 r17: 0x00000000
r18: 0x20000000 r19: 0x20020818 r20: 0x00000000
r21: 0x00000000 r22: 0x00000000 r23: 0x00000000
r24: 0x00000000 r25: 0x00000000
Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b ]---
git bisect doesn't seem to point anything conclusive.
This turned out to be a really stupid snafu - in a commit which was supposed to be a non-functional change. When breaking up page table headers into various bits and pieces (10d2a0b) I inadvertently broke functional caches. The fix is below.
diff --git a/arch/arc/include/asm/pgtable-bits-arcv2.h b/arch/arc/include/asm/pgtable-bits-arcv2.h
-#ifndef CONFIG_ARC_CACHE_PAGES
+#ifdef CONFIG_ARC_CACHE_PAGES
#define _PAGE_CACHEABLE (1 << 0) /* Cached (H) */
#else
#define _PAGE_CACHEABLE