Seeing spurious extra read of peripheral registers on ARC EM4 - auto-incrementing address issue?
jknGH opened this issue · 0 comments
Hi there - I am using openOCD with ARC to communicate with an ARC EM4 processor + Synopsys peripherals on an FPGA. I have a Digilent HS2 JTAG adapter.
Using the Metaware debugger I am able to examine and debug the memory-mapped peripheral registers as I expect; however I'm getting strange results when I use openOCD to make analogous reads & writes to the Peripheral. In this case I am working with the DW_apb_ssi SPI peripheral, but I think what I am seeing goes wider than that.
It seems that a 32-bit read of a peripheral address (via 'mdw', for instance) is also causing a read of the next address up. I take it that this is connected to the auto-address incrementing feature of the ARC's JTAG, and I need to understand how to stop it happening.
A concrete example. I have a DW_apb_ssi SPI peripheral at base memory address 0xe0082000. I have performed some SPI work and can read the Rx FIFO level register (@0x0xe0082024) to see that I have four entries in the Fifo. I then perform a read of the DW_apb_ssi's ID register @0xe008205c, which should be entirely without side-effects ... and I then see that the Rx Fifo level has gone down to three!
From this and other observations, I think what is happening is that the read from @0xe008205c is also causing a read from @0xe0082060, which is the Rx Fifo. I am therefore losing the first element in the fifo when I read from the (unconnected) ID register.
How can I somehow prevent openOCD from performing this spurious extra read? I can see that this might be useful for memory reads, but not for peripherals. Is there (for instance) a way of configuring an address region to be 'peripheral space'? Or is my guess as to what is going on incorrect?
Thanks, Jon N