fredrequin
Embedded software and electrical engineer FPGA tinkerer for more than 15 years
EREMSToulouse, France
Pinned Repositories
AliceRE
at_apollo_device
AT-Apollo.device v5.03 source code from 1999 Aminet release
fpga_1943
Verilog re-implementation of the famous CAPCOM arcade game
fx68k
FX68K 68000 cycle accurate SystemVerilog core
j68_cpu
Small microcoded 68000 verilog softcore
JiVe
Small micro-coded RISC-V softcore
nmos_sim
Simulate old NMOS logic using Kicad and Verilator
verilator_gowin
Re-coded Gowin GW1N primitives for Verilator use
verilator_helpers
C++ objects to help verilator simulations
verilator_xilinx
Re-coded Xilinx primitives for Verilator use
fredrequin's Repositories
fredrequin/j68_cpu
Small microcoded 68000 verilog softcore
fredrequin/verilator_xilinx
Re-coded Xilinx primitives for Verilator use
fredrequin/fpga_1943
Verilog re-implementation of the famous CAPCOM arcade game
fredrequin/JiVe
Small micro-coded RISC-V softcore
fredrequin/verilator_gowin
Re-coded Gowin GW1N primitives for Verilator use
fredrequin/fx68k
FX68K 68000 cycle accurate SystemVerilog core
fredrequin/AliceRE
fredrequin/at_apollo_device
AT-Apollo.device v5.03 source code from 1999 Aminet release
fredrequin/nmos_sim
Simulate old NMOS logic using Kicad and Verilator
fredrequin/verilator_helpers
C++ objects to help verilator simulations
fredrequin/exactstep
Instruction set simulator for RISC-V, MIPS and ARM-v6m
fredrequin/nvc
VHDL compiler and simulator
fredrequin/c--
c++ Bjarne Stroustrup
fredrequin/core_sdram_axi4
SDRAM controller with AXI4 interface
fredrequin/docker_open-src-cvc
Dockerfile for OSS CVC verilog simulator
fredrequin/hdlConvertor
Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTL4
fredrequin/HiVee
Multi threaded light weight RISC-V softcore
fredrequin/maixduino-genplus
Genesis-Plus-GX based MEGADRIVE/GENESIS emulator for the Maixduino
fredrequin/open-src-cvc
Mirror of tachyon-da cvc Verilog simulator
fredrequin/riscv
RISC-V CPU Core (RV32IM)
fredrequin/riscv-compliance
fredrequin/verilator
Verilator open-source SystemVerilog simulator and lint system
fredrequin/xvcd-anita
XVCD implementation for ANITA. Note that "ftdi_xvc_core.c" is a generic libftdi-based MPSSE XVC handler, and is awesome.
fredrequin/yosys
Yosys Open SYnthesis Suite
fredrequin/zephyr
Primary GIT Repository for the Zephyr Project