Second-level page table entries for adjacent peripherals

[didriklundberg]

Consider the registers of the UART in RPi2. They occupy an address sub-space of about 0,1 KiB. However, the second-level page table entry construction in pt_create_coarse (in arm_mmu_pt.c) will not construct any actual entries if you do not assign at least 1 KiB of space for the UART in board_mem.c.

For the particular example of the UART, this means that we allocate 0,9 KiB of "terra incognita" to the same page table entry.

For the RPi2, there is one big problem with this approach: The ARM timer and the interrupt controller are located within the same 0x1000 (at 3F00B400 and 3F00B200, respectively). In the current version, they are mapped to the same entry in board_mem.c, which means that they share access rights.

[didriklundberg]

A candidate solution is to give them slightly dislocated page entries, say from 3F00A300 to 3F00B300, and so on. But this can only solve the problem if there are no other adjacent peripherals, whose pages we end up moving into space we do not want to map.

[didriklundberg]

Here is a tentative summary of the base addresses of RPi2 peripherals:

3F003000 - System Timer

3F007000 - DMA controllers (15 of them, on sub-sections 0x100, 0x200, ...).

3F00B000 - Interrupt controller (sub-section 0x200)

3F00B000 - Timer (ARM side)

3F200000 - GPIO

3F201000 - UART

3F203000 - PCM module

3F204000 - SPI0

3F205000 - Broadcom serial controller 1.

3F214000 - SPI/BSC Slave

3F215000 - Auxiliaries: Mini-UART (not on RPi2), SPI1 and SPI2.

3F300000 - EMMC

3F804000 - Broadcom serial controller 2.
3F805000 - Broadcom serial controller 3.

3F980000??? - USB

3FE05000 - 16th DMA controller.

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