Verilog Header files support
Opened this issue · 6 comments
Add .vh among the file types known to ipbb
This works for me. One additional feature that could be useful would be to allow to specify verilog header in the dep file, as we do with —vhdl2008, as some files that need to be set as verilog headers are left with just the .v suffix. However, it is not essential as this can be done later in the setup.tcl.
In fact, it does not work using the build.tcl and settings.tcl scripts referenced in the dep file, for example, because the files are not yet added to the project. Is there an easy way to run a tcl script with ipbb after "proj create" has finished? Thanks!
closing and will open a new issue for corresponding source file attribute
Yes, there's a way: the -f/--finalize setup command flag, i.e. setup -f abc.tcl will execute abc.tcl after all sources have been imported.
hmm, I still have issues e.g
I put in my dep file:
setup --finalise ../cfg presynth.tcl
where presynth.tcl contains "get_files -all"
but at ipbb vivado project, when the file is sources, it reports:
generate-project | # get_files -all
generate-project | WARNING: [Vivado 12-818] No files matched '*'
Perhaps I am doing something else wrong.
Ok I got this working by adding the setup call in projects/examples/sb852/firmware/cfg/top.dep rather than in the board.dep file. Feel free to close issue. thanks!