kiniry
Dad. Partner. Scientist. Activist. Maker. I'm the Principled CEO and Chief Scientist at Free & Fair. I'm a Principal Scientist at Galois.
@FreeAndFair @GaloisInc Portland, OR
kiniry's Stars
mockito/mockito
Most popular Mocking framework for unit tests written in Java
mockito/mockito-kotlin
Using Mockito with Kotlin
typelevel/scalacheck
Property-based testing for Scala
scalatest/scalatest
A testing tool for Scala and Java developers
emil-e/rapidcheck
QuickCheck clone for C++ with the goal of being simple to use with as little boilerplate as possible.
etorreborre/specs2
Software Specifications for Scala
chipsalliance/firrtl
Flexible Intermediate Representation for RTL
black-parrot/black-parrot
A Linux-capable RISC-V multicore for and by the world
scalameter/scalameter
Microbenchmarking and performance regression testing framework for the JVM platform.
mockito/mockito-scala
Mockito for Scala language
ucb-bar/chiseltest
The batteries-included testing and formal verification library for Chisel-based RTL designs.
chipsalliance/synlig
SystemVerilog support for Yosys
chiselverify/chiselverify
A dynamic verification library for Chisel.
scalatest/scalatestplus-scalacheck
ScalaTest + ScalaCheck provides integration support between ScalaTest and ScalaCheck.
cocotb/cocotb-bus
Pre-packaged testbenching tools and reusable bus interfaces for cocotb
rsnikhil/Learn_Bluespec_and_RISCV_Design
Textbook and full source codes to learn basics of RISC-V pipelined CPU design using the Bluespec Hardware Design Language(s)
scalatest/scalatest-eclipse-plugin
ScalaTest plugin for Scala IDE
povik/yosys-slang
slang-based frontend for Yosys
pulp-platform/svase
BLu85/AES-GCM-128-192-256-bits
Configurable AES-GCM IP (128, 192, 256 bits)
chiselverify/vhdl2verilog
SMT-LIB/SMT-LIB-2
Public reference documents for the SMT-LIB standard
sscit/rel
A domain specific language for requirements engineering. Besides the DSL, the REL framework contains Python integration, and a Visual Studio Code Extension for IDE support to work with the DSL.
chiselverify/otherverify
Examples of verification solutions (e.g., UVM, cocotb,...)
iscas-tis/riscv-spec-core
Minimal RISC-V Chisel design strictly reflecting the ISA document for verification.
Open-MBEE/architecture-based-risk-analysis
scalatest/scalactic-website
Scalactic Website
lastland/ScalaHDL
santoslab/rts-showcase
vteague/MatchingElectronicResultsWithGenuineEvidence