v2.0.1 output on raspberry pi 4 / ubuntu 20 arm64

Question

v2.0.1 output on raspberry pi 4 / ubuntu 20 arm64

gounselor opened this issue 4 years ago · 12 comments

gounselor commented 4 years ago

Build the example program on:

lsb_release:

Distributor ID: Ubuntu
Description: Ubuntu 20.04.1 LTS
Release: 20.04
Codename: focal

uname -a:

Linux pi64 5.4.0-1023-raspi #26-Ubuntu SMP PREEMPT Thu Nov 12 14:58:33 UTC 2020 aarch64 aarch64 aarch64 GNU/Linux

From /proc/cpuinfo:
...
Hardware : BCM2835
Revision : c03111
Serial : 1000000033c9f617
Model : Raspberry Pi 4 Model B Rev 1.1

Output:

ms@pi64:~/Sync/cpuid$ ./cpuid
Name:
PhysicalCores: 0
ThreadsPerCore: 1
LogicalCores: 0
Family 0 Model: 0 Vendor ID: VendorUnknown
Features: ARMCPUID,ASIMD,CRC32,EVTSTRM,FP
Cacheline bytes: 64
L1 Data Cache: -1 bytes
L1 Instruction Cache: -1 bytes
L2 Cache: -1 bytes
L3 Cache: -1 bytes
Frequency 0 hz

Answer 1 · 2020-12-08T19:16:05.000Z

@gounselor Thanks! I assume there is nothing wrong with the listed features?

Answer 2 · 2020-12-08T19:26:31.000Z

@klauspost let me attach /proc/cpuinfo:

processor : 0
BogoMIPS : 108.00
Features : fp asimd evtstrm crc32 cpuid
CPU implementer : 0x41
CPU architecture: 8
CPU variant : 0x0
CPU part : 0xd08
CPU revision : 3

processor : 1
BogoMIPS : 108.00
Features : fp asimd evtstrm crc32 cpuid
CPU implementer : 0x41
CPU architecture: 8
CPU variant : 0x0
CPU part : 0xd08
CPU revision : 3

processor : 2
BogoMIPS : 108.00
Features : fp asimd evtstrm crc32 cpuid
CPU implementer : 0x41
CPU architecture: 8
CPU variant : 0x0
CPU part : 0xd08
CPU revision : 3

processor : 3
BogoMIPS : 108.00
Features : fp asimd evtstrm crc32 cpuid
CPU implementer : 0x41
CPU architecture: 8
CPU variant : 0x0
CPU part : 0xd08
CPU revision : 3

Hardware : BCM2835
Revision : c03111
Serial : 1000000033c9f617
Model : Raspberry Pi 4 Model B Rev 1.1

I'm happy to help, debug or try things out.

Answer 3 · 2020-12-08T19:45:53.000Z

Looks like it matches. So this is pretty much what I expect for now.

Maybe I can mimmic how Go sets the number of processors for GOMAXPROCS.

Answer 4 · 2020-12-08T19:59:41.000Z

Ok, so this is actual expected?

Answer 5 · 2020-12-08T20:09:36.000Z

Yes, hence why the documentation says:

Note that currently only features are detected on ARM, no additional information is currently available.

Referring to Features: ARMCPUID,ASIMD,CRC32,EVTSTRM,FP

If you want to, this should add some values for core counts, though it relies on the OS to provide that sparse information: #67

Answer 6 · 2020-12-08T20:27:13.000Z

Ok i understand. Just read about MIDR_EL1 here https://www.kernel.org/doc/html/latest/arm64/cpu-feature-registers.html.

So there is no easy way to get the values (besides reading /sys/devices/system/cpu/cpu0/regs/identification/midr_el1 on linux) and the feature flags are what counts here.

I guess this issue then might be closed. Thanks Klaus, (also for compress!)

Answer 7 · 2020-12-08T21:11:38.000Z

@gounselor I added some more info to #67 - though it is not super useful information and since I don't have any hardware to test it is rather cumbersome and travis takes hours to complete a single test.

Answer 8 · 2020-12-08T21:48:06.000Z

I tried to build with a cloned repo, branch origin/arm64-linux-detect-cores with go.mod replace and i get this:

github.com/klauspost/cpuid/v2.getproccount: relocation target runtime·sched_getaffinity not defined

Maybe i did something wrong using the clone repo, go.mod replace approach.

Answer 9 · 2020-12-08T21:49:54.000Z

Update:

replaced runtime·sched_getaffinity with runtime.sched_getaffinity in the cloned repo, it compiles. Output:

ms@pi64:~/Sync/cpuid$ ./cpuid
Name:
PhysicalCores: 4
ThreadsPerCore: 1
LogicalCores: 4
Family 0 Model: 0 Vendor ID: VendorUnknown
Features: ARMCPUID,ASIMD,CRC32,EVTSTRM,FP
Cacheline bytes: 64
L1 Data Cache: -1 bytes
L1 Instruction Cache: -1 bytes
L2 Cache: -1 bytes
L3 Cache: -1 bytes
Frequency 0 hz

Nice.

Answer 10 · 2020-12-08T22:04:35.000Z

Ah, I found it as well.

Ah, it shouldn't return right after the detectOS(c). I've updated the PR. does that make a difference?

Answer 11 · 2020-12-08T22:11:15.000Z

Yes:

Name:
PhysicalCores: 4
ThreadsPerCore: 1
LogicalCores: 4
Family 15 Model: 53379 Vendor ID: ARM
Features: ARMCPUID,ASIMD,CRC32,EVTSTRM,FP,GPA
Cacheline bytes: 64
L1 Data Cache: -1 bytes
L1 Instruction Cache: -1 bytes
L2 Cache: -1 bytes
L3 Cache: -1 bytes
Frequency 0 hz

Family is now detected.

Answer 12 · 2020-12-09T09:29:09.000Z

Merged. CI shows:

0.99s$ go test -test.v -test.run ^TestCPUID$
=== RUN   TestCPUID
--- PASS: TestCPUID (0.00s)
    cpuid_test.go:28: Max Function:0x0
    cpuid_test.go:30: Max Extended Function:0x0
    cpuid_test.go:31: VendorString: Applied Micro Circuits Corporation
    cpuid_test.go:32: VendorID: AMCC
    cpuid_test.go:33: Name: 
    cpuid_test.go:34: PhysicalCores: 32
    cpuid_test.go:35: ThreadsPerCore: 1
    cpuid_test.go:36: LogicalCores: 32
    cpuid_test.go:37: Family 63 Model: 2
    cpuid_test.go:38: Features: AESARM,ARMCPUID,ASIMD,CRC32,EVTSTRM,FP,GPA,PMULL,SHA1,SHA2
    cpuid_test.go:39: Cacheline bytes: 64
    cpuid_test.go:40: L1 Instruction Cache: -1 bytes
    cpuid_test.go:41: L1 Data Cache: -1 bytes
    cpuid_test.go:42: L2 Cache: -1 bytes
    cpuid_test.go:43: L3 Cache: -1 bytes
    cpuid_test.go:44: Hz: 0 Hz
PASS