/MineSweeper

on FPGA with VGA display

Primary LanguageVerilogGNU General Public License v3.0GPL-3.0

MineSweeper on FPGA with VGA

A salute to the classic mine sweeper game on the Xilinx Spartan-6 FPGA board with VGA output in Verilog HDL.

Miscellaneous

Source files and coe files included. For each coe file, you need to create an IP core, block memory, ROM.

And my board is Spartan6 N3, if your board is different, you need to change the .ucf file (in "code"). And I'm not sure that it can run on your board...

To be improved

If the maps can be randomized, the better! And, I'm almost running out the recourses on the board.

Acknowledge

Most of the current pictures I use are from sleroux on github.