liuhubing

liuhubing's Stars

• parthpower/DCC_Basic

  Typical project for Synopsys DC Compiler

  Language:Tcl52

• conorpp/learn-synopsys

  A hello world project to learn synopsys and make a multiplier circuit

  Language:Verilog41

• ultraembedded/cores

  Various HDL (Verilog) IP Cores

  Language:Verilog714215

• YosysHQ/yosys-bigsim

  A collection of big designs to run post-synthesis simulations with yosys

  Language:Verilog4816

• crosstool-ng/crosstool-ng

  A versatile (cross-)toolchain generator.

  Language:Shell2.2k669

• wwj718/awesome-raspberry-pi-zh

  树莓派(Raspberry Pi )资源大全中文版 , 包括工具、项目、镜像、资源等

  2.3k358

• rsta2/circle

  A C++ bare metal environment for Raspberry Pi with USB (32 and 64 bit)

  Language:C1.9k250

• OP-TEE/optee_os

  Trusted side of the TEE

  Language:C1.6k1.1k

• WangXuan95/USTC-RVSoC

  An FPGA-based RISC-V CPU+SoC with a simple and extensible peripheral bus. 基于FPGA的RISC-V SoC，包含一个RV32I CPU、一个简单可扩展的总线、一些外设。

  Language:SystemVerilog36375

• dwelch67/raspberrypi

  Raspberry Pi ARM based bare metal examples

  Language:Assembly2.7k486

• darklife/darkriscv

  opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

  Language:Verilog2.1k289

• marshallma21/AUTOSAR_SampleProject_S32K144

  This is a project based on NXP's MCAL sample for AUTOSAR 4.2.2. Some changes are made to adapt to S32K144evb.

  Language:C10150

• openAUTOSAR/classic-platform

  Open source AUTOSAR classic platform forked from the Arctic Core

  Language:C524314

• gthparch/macsim

  A heterogeneous architecture timing model simulator.

  Language:C++13850

• capstone-engine/capstone

  Capstone disassembly/disassembler framework for ARM, ARM64 (ARMv8), Alpha, BPF, Ethereum VM, HPPA, LoongArch, M68K, M680X, Mips, MOS65XX, PPC, RISC-V(rv32G/rv64G), SH, Sparc, SystemZ, TMS320C64X, TriCore, Webassembly, XCore and X86.

  Language:C7.7k1.6k

• AZO234/RaspberryPi_BareMetal

  RaspberryPi BareMetal env

  Language:C407

• verilator/verilator

  Verilator open-source SystemVerilog simulator and lint system

  Language:C++2.6k622

• f32c/f32c

  A 32-bit MIPS / RISC-V core & SoC, 1.55 DMIPS/MHz, 2.96 CM/Mhz

  Language:C404104

• stnolting/neo430

  :computer: A damn small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.

  Language:VHDL20028

• deneschen/Raspi_JTAG_debug

  Raspi3 Raspi4 jtag debug

  Language:Tcl41

• strukturag/libde265

  Open h.265 video codec implementation.

  Language:C++1.7k458

• openasic-org/xk265

  xk265：HEVC/H.265 Video Encoder IP Core (RTL)

  Language:Verilog23675

• Bearzeng/h.265_encoder

  Language:Verilog8439

• stnolting/neorv32

  :desktop_computer: A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

  Language:VHDL1.6k229

• google/skywater-pdk

  Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.

  Language:Python3k395

• olofk/fusesoc

  Package manager and build abstraction tool for FPGA/ASIC development

  Language:Python1.2k248

• ghdl/ghdl

  VHDL 2008/93/87 simulator

  Language:VHDL2.4k366

• armink/FreeModbus_Slave-Master-RTT-STM32

  Add master mode to FreeModbus. | 在 FreeModbus 中添加主机模式

  Language:C1.6k823

• stephane/libmodbus

  A Modbus library for Linux, Mac OS, FreeBSD and Windows

  Language:C3.5k1.8k

• cwalter-at/freemodbus

  BSD licensed MODBUS RTU/ASCII and TCP slave

  Language:C800404