longheng0201

longheng0201's Stars

• NVlabs/timeloop

  Timeloop performs modeling, mapping and code-generation for tensor algebra workloads on various accelerator architectures.

  Language:C++336102

• ShepardSiegel/ocpi

  Semi-private RTL development upstream of OpenCPI - this is *not* the OpenCPI repo!

  Language:Verilog248

• bucaps/marss-riscv

  TinyEMU based full system cycle-level micro-architectural research simulator for single-core RISC-V systems

  Language:C++14423

• Shihao-Song/HybridSim

  A Cycle-Level, Multi-Core CPU Trace Driven PCM-Based System Simulator

  Language:C++31

• gpgpu-sim/gpgpu-sim_distribution

  GPGPU-Sim provides a detailed simulation model of contemporary NVIDIA GPUs running CUDA and/or OpenCL workloads. It includes support for features such as TensorCores and CUDA Dynamic Parallelism as well as a performance visualization tool, AerialVisoin, and an integrated energy model, GPUWattch.

  Language:C++1.1k508

• tukl-msd/DRAMSys

  DRAMSys a SystemC TLM-2.0 based DRAM simulator.

  Language:C++21957

• Xilinx/libsystemctlm-soc

  SystemC/TLM-2.0 Co-simulation framework

  Language:Verilog22268

• mariusmm/RISC-V-TLM

  RISC-V SystemC-TLM simulator

  Language:C27672

• Liu-Cheng/cycle-accurate-SystemC-simulator-over-ramulator

  An example of using Ramulator as memory model in a cycle-accurate SystemC Design

  Language:C++469

• longheng0201/HBM

  High Bandwidth Memory (HBM) timing model based on DRAMSim2

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