Merging VexRiscv 1.1
Dolu1990 opened this issue · 7 comments
Hi,
VexRiscv 1.1 was just released. And improved/fix/added stuff :
- Compatible with mainline linux
- Write-throug data cache
- Better RISC-V CSR compliance
- Fix some bugs occurring when using both exception and interruptions.
If that's fine for you, i will merge it into VexRiscv-verilator.
Also if i do so, i would like to move the VexRiscv dependance from SBT to a regular git submodule.
That's fine, but do you want to do it also (or instead) in HeavyX?
Verilog outputs from HeavyX VexRiscv are available without installing anything, e.g. https://nixbld.m-labs.hk/build/3231
I will merge on this repo, as people are already using it. I'm now testing nix, i'm never used it before.Trying now to see what is realted to what exactly.
I go the https://nixbld.m-labs.hk/build/3231 produce locally working.
If i clone https://git.m-labs.hk/M-Labs/HeavyX.git, then which command should i run to build the vexriscv-small from derivations.nix ?
nix-build -A vexriscv-small release.nix
@sbourdeauducq There is :
Dolu1990/HeavyX@b80c5a4
Not sure how to emit a pull request to the m-labs.
Not sure how to emit a pull request to the m-labs.
Yeah I still need to sort this out.
Merged it upstream, thanks!