Documentation typo

[YggdrasiI]

Hello,

the register table in expressions.html contain vw_busy two times.
Second entry, in line 280, should be vw_wait.

Regards YggdrasiI

P.S. The documentation, bottom at page 55 , says about VPM writes "Up to two writes are queued in a FIFO and writes will stall the QPU when the FIFO is full."
Would this inplicate that a dma store command needs to wait until the VPM write command finished? I did not found any comment (or something like 'vpm_wait') about that.

[Terminus-IMRC]

From my experiments, I think you don't need to wait until the FIFO is written to VPM because writing to vpm_st_addr syncs FIFO to VPM. If you feel insecure, you can do 1-vector VPM read to flush the FIFO, according to Broadcom source https://github.com/bieltv3/brcm_android_ICS_graphics_stack/blob/master/brcm_usrlib/dag/vmcsx/middleware/khronos/vg/2708/vg_util_4.qinc#L20 .

[YggdrasiI]

Thanks for the unexpected reply. I agree, triggering a DMA write directly after writing the data into the VPM should not be problematic.

Regards