small Xilinx synth improvement

[LMN128]

Hi, I recommend change line 865 of T80.vhd from
ioq := (ioq and x"7") xor ('0'&BusA);
to
ioq := (ioq and "000000111") xor ('0'&BusA);
original one is problem to synthetized by Xilinx Vivado with error:
[Synth 8-509] operands of logical operator '&' have different lengths (9 vs. 4) ["C:/temp/_Core313/ultimate.srcs/sources_1/new/T80/T80.vhd":685]

Thanks