nmunro/pythoncpu

Implement division operators

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nmunro commented

Byte operations

  • div.b data register to data register

  • div.b data register to address register

  • div.b data register to memory address

  • div.b data register to integer (only changes CCR flags)

  • div.b address register to data register

  • div.b address register to address register

  • div.b address register to memory address

  • div.b address register to integer (only changes CCR flags)

  • div.b memory address to data register

  • div.b memory address to address register

  • div.b memory address to memory address

  • div.b memory address to integer (only changes CCR flags)

  • div.b integer to data register

  • div.b integer to address register

  • div.b integer to memory address

  • div.b integer to integer (only changes CCR flags)

Word operations

  • div.w data register to data register

  • div.w data register to address register

  • div.w data register to memory address

  • div.w data register to integer (only changes CCR flags)

  • div.w address register to data register

  • div.w address register to address register

  • div.w address register to memory address

  • div.w address register to integer (only changes CCR flags)

  • div.w memory address to data register

  • div.w memory address to address register

  • div.w memory address to memory address

  • div.w memory address to integer (only changes CCR flags)

  • div.w integer to data register

  • div.w integer to address register

  • div.w integer to memory address

  • div.w integer to integer (only changes CCR flags)

Long operations

  • div.l data register to data register

  • div.l data register to address register

  • div.l data register to memory address

  • div.l data register to integer (only changes CCR flags)

  • div.l address register to data register

  • div.l address register to address register

  • div.l address register to memory address

  • div.l address register to integer (only changes CCR flags)

  • div.l memory address to data register

  • div.l memory address to address register

  • div.l memory address to memory address

  • div.l memory address to integer (only changes CCR flags)

  • div.l integer to data register

  • div.l integer to address register

  • div.l integer to memory address

  • div.l integer to integer (only changes CCR flags)