nxp-mcuxpresso/mcux-sdk

[BUG] CLOCK_EnableUsbhs0/1PhyPllClock uses PWD_SET instead of PWD register

Closed this issue · 2 comments

c-mauderer commented

The CLOCK_EnableUsbhs0PhyPllClock and CLOCK_EnableUsbhs1PhyPllClock functions try to set the PWD of the USBPHY to 0 with lines like this:

USBPHY1->PWD_SET  = 0x0;

This won't have an effect because the PWD_SET register is used. Instead either PWD should be set to 0 or PWD_CLR should be set to 0xffffffff.

The lines are here:

mcux-sdk/devices/MIMXRT1166/drivers/fsl_clock.c

Line 1738 in ba0921b

USBPHY1->PWD_SET = 0x0;

mcux-sdk/devices/MIMXRT1166/drivers/fsl_clock.c

Line 1844 in ba0921b

USBPHY2->PWD_SET = 0x0;

mcuxsusan commented

Thanks for reporting the issue, already asked development team to check, reply could be delayed.

mcuxsusan commented

The issue has been fixed in latest main branch, which integrate the MCUX_2.14.0 release update.
I see the PWD register operation is removed.

mcux-sdk/devices/MIMXRT1166/drivers/fsl_clock.c

Line 1660 in 3f6a75a

bool CLOCK_EnableUsbhs0PhyPllClock(clock_usb_phy_src_t src, uint32_t freq)