[mantle primitives] Interface change proposal for logic
Opened this issue · 5 comments
Right now we have separate primitives Not for invert of a Bit type and Invert for invert of a Bits type. I propose we merge them into a single, polymorphic Invert primitive. This came up when documenting the ~ operator, which needs to dispatch on the type and call the right function.
Is there a strong case for having Not be separate than Invert? The argument for using Invert is that gives us Not for implementation logical not (!). Otherwise, we could use LNot for logical not.
How about making Invert polymorphic, and keeping Not the way it is?
Or maybe make Not take a Bit or a Bits(1)?
That would work.
What about logical Not? Actually, I realized we could extend Not to be polymorphic (so keep the same behavior for Bit, which is equivalent to Invert), but for Bits types do the logical not.
I am not following. To me logical values are equivalent to Bit. So Logical Not acts on a Bit.
Verilog has a logical ! operator, which corresponds to 1 if the value is zero, and 0 otherwise. This works on multi-bit values (so !0x3 would be 0)
SO Not is equivalent to ReduceNAnd?