qyw123

Pinned Repositories

gatelevel_netlist_dataset
adder/counter/multiplier/divider/CRC/shifter verilog model, with RTL and gate level netlist
Language:Verilog10
hello_gitworld
qyw learn git and github
Language:Python00
image_attention_rtl_classifiction
00
transformer_core
a student trainning project for HLS and transformer
Language:C++10 1 02

qyw123's Repositories

qyw123/transformer_core
a student trainning project for HLS and transformer
Language:C++10 1 02
qyw123/gatelevel_netlist_dataset
adder/counter/multiplier/divider/CRC/shifter verilog model, with RTL and gate level netlist
Language:Verilog10
qyw123/hello_gitworld
qyw learn git and github
Language:Python00
qyw123/image_attention_rtl_classifiction
00