Failed VPR to generate power

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I have A CARRY SELECT ADDER 64 Bit (csa_64.v). VPR gives the timing analysis 
successfully but it fails to give the power file name as csa_64.power.

I used the commands:
1.vtr_release_7.0_full/vtr_release/vtr_flow/tasks$ ../scripts/run_vtr_flow.pl 
../benchmarks/verilog/csa_64.v ../arch/timing/k4_N4_90nm.xml

2.vtr_release_7.0_full/vtr_release/vtr_flow/tasks$ ../scripts/run_vtr_flow.pl 
../benchmarks/verilog/diffeq1.v 
../arch/power/k6_N10_I33_Fi6_L1_frac0_ff1_45nm.xml -power -cmos_tech 
../tech/PTM_45nm/45nm.xml

The first command runs successfully but the second one failed vpr.

The file csa_64.v is attached.

Any suggested solution will be helpful for us.

Thanks

Original issue reported on code.google.com by srimani....@gmail.com on 20 Feb 2015 at 9:52

Attachments:

• csa_64.v