Clarify the mapping of pseudo-intrinsics

[rofirrim]

This is a comment from the ARC review.

The spec includes a number of convenience intrinsics (pseudo-intrinsics) that do not map necessarily to a single instruction (or a specific RVV instruction). However, for most intrinsics, including some pseudo-intrinsics, the mapping to RVV instructions is almost straightforward (i.e. 1-to-1).

For the pseudo-intrinsis that map to more than one instruction, a user might incorrectly assume those instructions also have straightforward mappings to RVV instructions.

We should make this fact more obvious in the text.