Enable performance counters

[xydas97]

Hello, I would need some help enabling performance counters for rocket core of rocketchip. I am currently trying to directly use csr_write() on MCOUNTEREN, SCOUNTEREN, MCOUNTINHIBIT and MHPMEVENT in the sbi_init.c file. However I see that the values are not set in those counters. Are there any functions that I could use or any direction on how to monitor TLB misses with performance counters?

Or is there any documentation on how to use the sbi_pmu to set those performance counters?

[lyctw]

Hi xydas97,

You'll need a PMU node that provides event id to selector value (the value written to MHPMEVENT) mapping, then you can use perf-tool in Linux:

CONFIG_RISCV_PMU=y
CONFIG_RISCV_PMU_SBI=y

See drivers/perf/riscv_pmu_sbi.c for details.

PMU SBI interfaces are documented in the SBI spec.

[atishp04]

I think it's duplicate of
#249

Closing.